Presentation 1994/1/21
Design of a multithreaded processor dedicated to image generation: High-level synthesis design
Toshihiro Masaki, Takao Onoe, Hiroaki Hirata, Kozo Kimura, Shigeo Asahara, Takayuki Sagishima, Isao Shirakawa,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) In this paper,design of a multithreaded processor dedicated to image generation is described.A multithreaded processor can execute plural instruction streams simultaneously by sharing a number of functional units.However,the control mechanism of such a multithreaded processor is essentially too complicated to be realized simply by expanding the conventional design concept.A high-level synthesis scheme can simplify the behavioral description of not only the structure but also the control of a highly complex hardware,and therefore enables design for such complicated mechanism of a multithreaded processor.Implementation results of both the description and the synthesis for a multithreaded processor are described.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) processor / multithread / parallel processing / high-level synthesis / image generation
Paper # CAS93-99
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Committee CAS
Conference Date 1994/1/21(1days)
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Registration To Circuits and Systems (CAS)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Design of a multithreaded processor dedicated to image generation: High-level synthesis design
Sub Title (in English)
Keyword(1) processor
Keyword(2) multithread
Keyword(3) parallel processing
Keyword(4) high-level synthesis
Keyword(5) image generation
1st Author's Name Toshihiro Masaki
1st Author's Affiliation Department of Information Systems Engineering,Faculty of Engineering,Osaka University()
2nd Author's Name Takao Onoe
2nd Author's Affiliation Department of Information Systems Engineering,Faculty of Engineering,Osaka University
3rd Author's Name Hiroaki Hirata
3rd Author's Affiliation Media Research Laboratory,Matsushita Electric Industrial
4th Author's Name Kozo Kimura
4th Author's Affiliation Media Research Laboratory,Matsushita Electric Industrial
5th Author's Name Shigeo Asahara
5th Author's Affiliation Media Research Laboratory,Matsushita Electric Industrial
6th Author's Name Takayuki Sagishima
6th Author's Affiliation Media Research Laboratory,Matsushita Electric Industrial
7th Author's Name Isao Shirakawa
7th Author's Affiliation Department of Information Systems Engineering,Faculty of Engineering,Osaka University
Date 1994/1/21
Paper # CAS93-99
Volume (vol) vol.93
Number (no) 432
Page pp.pp.-
#Pages 8
Date of Issue