Presentation | 1993/6/19 A Binary Associative Memory with Multilayered Perceptrons Chun-ying Ho, Shinsaku Mori, |
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Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | In the paper,a multilayered associative memory that comprises only binary synapses is proposed.The network consists of two hidden layers which aim at achieving a better storage capacity and recall performances.A novel learning algorithm is then resented. The learning algorithm is capable of storing all the exemplar patterns as fixed points and of elimination most of the spurious states.Since the connection weights in the network are either 1 or -1,the proposed network exhibits a simple architecture that facilitates VLSI or ASIC implementation.Finally,the simulation results are shown to validate the efficiency of the network. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | Multilayered feedforward network / ASIC / VLSI / Spurions states / storage capacity |
Paper # | CAS93-44,NLP93-32 |
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Conference Information | |
Committee | CAS |
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Conference Date | 1993/6/19(1days) |
Place (in Japanese) | (See Japanese page) |
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Paper Information | |
Registration To | Circuits and Systems (CAS) |
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Language | ENG |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | A Binary Associative Memory with Multilayered Perceptrons |
Sub Title (in English) | |
Keyword(1) | Multilayered feedforward network |
Keyword(2) | ASIC |
Keyword(3) | VLSI |
Keyword(4) | Spurions states |
Keyword(5) | storage capacity |
1st Author's Name | Chun-ying Ho |
1st Author's Affiliation | Department of Electrical Engineering,Faculty of Sciences and Technology,Keio University() |
2nd Author's Name | Shinsaku Mori |
2nd Author's Affiliation | Department of Electrical Engineering,Faculty of Sciences and Technology,Keio University |
Date | 1993/6/19 |
Paper # | CAS93-44,NLP93-32 |
Volume (vol) | vol.93 |
Number (no) | 102 |
Page | pp.pp.- |
#Pages | 6 |
Date of Issue |