| Presentation | 1998/9/25 Improved hardware of network distributed node architecture MESCAR Akira Tanaka, Shigeki Yamada, Satoshi Tanaka, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | The Mescar is the network distributed processing architecture that realizes the inter-node-communication with small software overhead, using network-wide shared memory. We already developed the first version of the inter-node-communication hardware (distributed memory coupler), that is the main element of the MESCAR system. In this report we explain the techniques to make the processing speed of the distributed memory coupler fast by improving the main algorithm. We analyzed the problems in the firmware processing, replaced the firmware with hardware with pipeline processing and parallel processing, fixed the data length in the data field of the payload, and simplified the inner data structure. Consequently, the data transfer rate of the distibuted memory coupler achieved more than about 43 times on sender side and more than 8.6 times on receiver side as large as those of the first version. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | distributed processing / message communication / distributed shared memory / network virtual address / ATM / inter-processor communication |
| Paper # | SSE98-106,IN98-87,CS98-103 |
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| Conference Information | |
| Committee | IN |
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| Conference Date | 1998/9/25(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Information Networks (IN) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Improved hardware of network distributed node architecture MESCAR |
| Sub Title (in English) | |
| Keyword(1) | distributed processing |
| Keyword(2) | message communication |
| Keyword(3) | distributed shared memory |
| Keyword(4) | network virtual address |
| Keyword(5) | ATM |
| Keyword(6) | inter-processor communication |
| 1st Author's Name | Akira Tanaka |
| 1st Author's Affiliation | NTT Optical Network System Laboratories() |
| 2nd Author's Name | Shigeki Yamada |
| 2nd Author's Affiliation | NTT Optical Network System Laboratories |
| 3rd Author's Name | Satoshi Tanaka |
| 3rd Author's Affiliation | NTT Optical Network System Laboratories |
| Date | 1998/9/25 |
| Paper # | SSE98-106,IN98-87,CS98-103 |
| Volume (vol) | vol.98 |
| Number (no) | 300 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |