Presentation 2000/7/14
Power/Ground Plane Resonance Reduction using High Resistance Conductor Pattern
Yoshihiro TAKESHITA, Satoru TAKENOUCHI, Shinya TERAO, Ryuji KOGA,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) We propose a printed circuit board(PCB) with a circuit of lossy structure to reduce radiated emissions generated by digital devices. To suppress undesirable resonance, high resistance conductor patterns are placed around solid power/ground planes. The high-resistance conductor patterns can disperse the high frequency electromagnetic energy. The properly designed resistance patterns conscious of impedance matching can reduce ground bounces and resulting radiation cased by the resonance associated with the solid power/ground planes and decoupling capacitors.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) EMI / PCB / Resistance / Power and Ground Plane / Resonance / Ground bounce
Paper # EMCJ2000-38
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Conference Information
Committee EMCJ
Conference Date 2000/7/14(1days)
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Paper Information
Registration To Electromagnetic Compatibility (EMCJ)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Power/Ground Plane Resonance Reduction using High Resistance Conductor Pattern
Sub Title (in English)
Keyword(1) EMI
Keyword(2) PCB
Keyword(3) Resistance
Keyword(4) Power and Ground Plane
Keyword(5) Resonance
Keyword(6) Ground bounce
1st Author's Name Yoshihiro TAKESHITA
1st Author's Affiliation Kyocera Corporation, R&D Center Kogashima()
2nd Author's Name Satoru TAKENOUCHI
2nd Author's Affiliation Kyocera Corporation, R&D Center Kogashima
3rd Author's Name Shinya TERAO
3rd Author's Affiliation Kyocera Corporation, R&D Center Kogashima
4th Author's Name Ryuji KOGA
4th Author's Affiliation Faculty of Engineering, Okayama University
Date 2000/7/14
Paper # EMCJ2000-38
Volume (vol) vol.100
Number (no) 207
Page pp.pp.-
#Pages 5
Date of Issue