Presentation 1995/12/15
Deterioration of a Integrated Circuit by the Voltage Surge
Hiroki KOKUBO, Nobuo MUROTA,
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Abstract(in English) The immunity of a CMOS IC against electrostatic discharges and a lightning surge is studied. We have measured the breakdown voltage of the IC in electrostatic discharges by using a machine model (MM), a human body model (HBM) and a charged device model (CDM). The breakdown voltage of MM is 0.9kV, and that of HBM is 8kV. When using CDM, the IC isn't deteriorated by 4kV discharge which is the withstand voltage of our CDM. An IC is easily broken by a lightning surge, and the breakdown voltage of the CMOS IC is about 50V. Moreover we found that the iteration of electrostatic discharges below the breakdown voltage breaks the IC.
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Keyword(in English) IC deterioration / breakdown voltage / electrostatic discharge / lightning surge
Paper # EMCJ95-73
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Conference Information
Committee EMCJ
Conference Date 1995/12/15(1days)
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Registration To Electromagnetic Compatibility (EMCJ)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Deterioration of a Integrated Circuit by the Voltage Surge
Sub Title (in English)
Keyword(1) IC deterioration
Keyword(2) breakdown voltage
Keyword(3) electrostatic discharge
Keyword(4) lightning surge
1st Author's Name Hiroki KOKUBO
1st Author's Affiliation Industrial Research Institute, Aichi Prefectural Government()
2nd Author's Name Nobuo MUROTA
2nd Author's Affiliation Industrial Research Institute, Aichi Prefectural Government
Date 1995/12/15
Paper # EMCJ95-73
Volume (vol) vol.95
Number (no) 438
Page pp.pp.-
#Pages 6
Date of Issue