Presentation | 1996/12/21 A method to detect a malfunction place of PCBs by ESD simulater Hiroshi ONOMAE, Yoji NAGASAWA, |
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PDF Download Page | PDF download Page Link |
Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | This paper is discribed the Immunity evaluation system to analyze a malfunction distribution of PCBs by a local electro static discharge. A malfunction distribution is displayed on a picture of PCBs by 6 phased color and a voltage and malfunction discrimination code. It can detect a malfunction place being efficient by changing an electric discharge range. Incase of an experimental PCBs, reset patterns of CPU were detected as a place to be able easily to do a malfunction. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | ESD / immunity / printed circuit board / malfunction |
Paper # | EMCJ96-48 |
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Conference Information | |
Committee | EMCJ |
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Conference Date | 1996/12/21(1days) |
Place (in Japanese) | (See Japanese page) |
Place (in English) | |
Topics (in Japanese) | (See Japanese page) |
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Paper Information | |
Registration To | Electromagnetic Compatibility (EMCJ) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | A method to detect a malfunction place of PCBs by ESD simulater |
Sub Title (in English) | |
Keyword(1) | ESD |
Keyword(2) | immunity |
Keyword(3) | printed circuit board |
Keyword(4) | malfunction |
1st Author's Name | Hiroshi ONOMAE |
1st Author's Affiliation | Kagoshima Prefectural Institute of Industrial tecnology() |
2nd Author's Name | Yoji NAGASAWA |
2nd Author's Affiliation | Faculty of engineering, Kagoshima University |
Date | 1996/12/21 |
Paper # | EMCJ96-48 |
Volume (vol) | vol.96 |
Number (no) | 441 |
Page | pp.pp.- |
#Pages | 6 |
Date of Issue |