Presentation 1997/2/19
An Application of VSR-PLL to a Ricean Fading Channel
Masanori HAMAMURA, Shin'ichi TACHIKAWA,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) Vehicular speed response phase locked loop (VSR-PLL) is a novel circuit to remove a steady-state frequency offset which arises in the receiver with directive antenna. The circuit will be applied to a Ricean fading environment in this report. For an application of VSR-PLL to the Ricean statistics channel, the Doppler shift information of direct-wave must be obtained because the output signal of VCO will be controlled with respect to the frequency by using the information. This report describes an estimation method for the Doppler shift of the direct-wave, and shows the several results of the performance analysis for the estimation method and the VSR-PLL with the method.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) mobile communication / Ricean fading / millimeter wave / PLL / BPSK / frequency offset / irreducible bit error rate
Paper # A・P96-138,EMCJ96-73,RCS96-152,MW96-178
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Conference Information
Committee EMCJ
Conference Date 1997/2/19(1days)
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Paper Information
Registration To Electromagnetic Compatibility (EMCJ)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) An Application of VSR-PLL to a Ricean Fading Channel
Sub Title (in English)
Keyword(1) mobile communication
Keyword(2) Ricean fading
Keyword(3) millimeter wave
Keyword(4) PLL
Keyword(5) BPSK
Keyword(6) frequency offset
Keyword(7) irreducible bit error rate
1st Author's Name Masanori HAMAMURA
1st Author's Affiliation Tachikawa lab., Department of Electrical Engineering, Nagaoka University of Technology()
2nd Author's Name Shin'ichi TACHIKAWA
2nd Author's Affiliation Tachikawa lab., Department of Electrical Engineering, Nagaoka University of Technology
Date 1997/2/19
Paper # A・P96-138,EMCJ96-73,RCS96-152,MW96-178
Volume (vol) vol.96
Number (no) 526
Page pp.pp.-
#Pages 6
Date of Issue