Presentation 1998/3/23
A new PHL system implemented on Alpha-chip
Keishi Sato, Tohru Aoki, Motoaki Terashima,
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Abstract(in English) PHL(Portable Hashed Lisp)is a dialect of LISP and its system is orignally designed for 32-bits machine implementations.In this paper, we present the design and implementation of new PHL, on an Alpha-chip machine with 64 bits architecture, and the analysis of its compactifying garbage collection using a new sheme.The garbage collection is based on"generation"and focuses its scavenge on recently used cells rather than all used cells of a heap so that"young"cells begin in use are highly localized in the heap.The new PHL with such garbage collection realizes the economy of the total execution time.
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Keyword(in English) Lisp / 64bit-architecture / Data representation / Garbage Collection
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Conference Date 1998/3/23(1days)
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Language JPN
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Title (in English) A new PHL system implemented on Alpha-chip
Sub Title (in English)
Keyword(1) Lisp
Keyword(2) 64bit-architecture
Keyword(3) Data representation
Keyword(4) Garbage Collection
1st Author's Name Keishi Sato
1st Author's Affiliation Graduate School of Information Systems University of Electro-Communications()
2nd Author's Name Tohru Aoki
2nd Author's Affiliation Graduate School of Information Systems University of Electro-Communications
3rd Author's Name Motoaki Terashima
3rd Author's Affiliation Graduate School of Information Systems University of Electro-Communications
Date 1998/3/23
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Volume (vol) vol.97
Number (no) 629
Page pp.pp.-
#Pages 8
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