Presentation 1998/3/23
Implementation and Evaluation of Massively Parallel Rewriting
Hiromichi Hirata, Shigenori Ioroi, Kazuhiro Ogata, Kokichi Futatsugi,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) Term rewriting systems can be used as computational models to implement language processors and theorem provers based on equational logic such as algebraic specification languages.Since the systems inherently contain concurrency, it is possible to improve their rewriting speed drastically by implementing the systems on a massively parallel computer so as to take advantage of the concurrency.In this paper, the design and implementation of Massively Parallel TRAM are described, which has been designed to be executed on a massively parallel computer.Its preliminary performance results are also reported.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) parallel rewriting / abstract machines / massively parallel computers
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Conference Date 1998/3/23(1days)
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Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Implementation and Evaluation of Massively Parallel Rewriting
Sub Title (in English)
Keyword(1) parallel rewriting
Keyword(2) abstract machines
Keyword(3) massively parallel computers
1st Author's Name Hiromichi Hirata
1st Author's Affiliation Graduate School of Information Science Japan Advanced Institute of Science and Technology()
2nd Author's Name Shigenori Ioroi
2nd Author's Affiliation Graduate School of Information Science Japan Advanced Institute of Science and Technology
3rd Author's Name Kazuhiro Ogata
3rd Author's Affiliation Graduate School of Information Science Japan Advanced Institute of Science and Technology
4th Author's Name Kokichi Futatsugi
4th Author's Affiliation Graduate School of Information Science Japan Advanced Institute of Science and Technology
Date 1998/3/23
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Volume (vol) vol.97
Number (no) 629
Page pp.pp.-
#Pages 8
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