Presentation | 2002/9/20 An Analog Integrated Circuit Based on Vertebrate Outer Retina with Superior Tolerance for the MOS Transistor Mismatch Amal Bandula KARIYAWASAM, Akira TAKASAKI, Kimihiro NISHIO, Hiroshi ABE, Shinya SAWA, Yuzo FURUKAWA, Hiroo YONEZU, |
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PDF Download Page | PDF download Page Link |
Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | We have improved the tolerance of the edge detection network based on vertebrateouter retina for the threshold voltage and current factor variations of MOS transistors. Simulation results using the simulation program with integrated circuit emphasis (SPICE) indicated the weak tolerance of the edge detection network for the threshold voltage and current factor variations The novel edge detection circuit constructed with a feedback circuit that has superior tolerance for the MOS transistor mismatch. As a result of simulations, reduced influence for the variation of threshold voltage and the current factor was confirmed. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | edge detection / analog integrated circuit / threshold voltage / current factor / feedback circuit |
Paper # | ICD2002-94 |
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Conference Information | |
Committee | ICD |
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Conference Date | 2002/9/20(1days) |
Place (in Japanese) | (See Japanese page) |
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Topics (in Japanese) | (See Japanese page) |
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Paper Information | |
Registration To | Integrated Circuits and Devices (ICD) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | An Analog Integrated Circuit Based on Vertebrate Outer Retina with Superior Tolerance for the MOS Transistor Mismatch |
Sub Title (in English) | |
Keyword(1) | edge detection |
Keyword(2) | analog integrated circuit |
Keyword(3) | threshold voltage |
Keyword(4) | current factor |
Keyword(5) | feedback circuit |
1st Author's Name | Amal Bandula KARIYAWASAM |
1st Author's Affiliation | Department of Electrical and Electronic Engineering, Toyohashi University of Technology() |
2nd Author's Name | Akira TAKASAKI |
2nd Author's Affiliation | Department of Electrical and Electronic Engineering, Toyohashi University of Technology |
3rd Author's Name | Kimihiro NISHIO |
3rd Author's Affiliation | Department of Electrical and Electronic Engineering, Toyohashi University of Technology |
4th Author's Name | Hiroshi ABE |
4th Author's Affiliation | Department of Electrical and Electronic Engineering, Toyohashi University of Technology |
5th Author's Name | Shinya SAWA |
5th Author's Affiliation | Department of Electrical and Electronic Engineering, Toyohashi University of Technology |
6th Author's Name | Yuzo FURUKAWA |
6th Author's Affiliation | Department of Electrical and Electronic Engineering, Toyohashi University of Technology |
7th Author's Name | Hiroo YONEZU |
7th Author's Affiliation | Department of Electrical and Electronic Engineering, Toyohashi University of Technology |
Date | 2002/9/20 |
Paper # | ICD2002-94 |
Volume (vol) | vol.102 |
Number (no) | 340 |
Page | pp.pp.- |
#Pages | 5 |
Date of Issue |