Presentation 2002/2/28
Two-Step Improved-Breaking-Off-Search Motion Estimation Algorithm and Low-Power 0.13- μm CMOS Motion Estimators for MPEG-2 Encoding
Yuichiro Miyazaki, Tadayoshi Enomoto,
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Abstract(in English) Power dissipation (P) of an absolute difference (AD) circuit has been required to reduce as low as 0.1 W. The "two-step improved-breaking-off-search (2S-IBOS)" method, which can drastically reduces the number of block matchings (N_b) to 1/3 that of the full-search (FS) method, and maintain the visual quality at the same level with FS. A new 0.13-μm CMOS Wallace-tree type AD circuit for MPEG-2. MP@ML was designed using 25-IBOS. P was reduced to 83 mW, which is only 14.4 % that of the previous designed AD circuit using FS. With a low-bit resolution (4bit/pixel) technology, P was further reduced to 44 mW.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) motion-estimation / power dissipation / MPEG-2 / CMOS
Paper # ICD2001-233
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Conference Date 2002/2/28(1days)
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Registration To Integrated Circuits and Devices (ICD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Two-Step Improved-Breaking-Off-Search Motion Estimation Algorithm and Low-Power 0.13- μm CMOS Motion Estimators for MPEG-2 Encoding
Sub Title (in English)
Keyword(1) motion-estimation
Keyword(2) power dissipation
Keyword(3) MPEG-2
Keyword(4) CMOS
1st Author's Name Yuichiro Miyazaki
1st Author's Affiliation Graduate School of Science and Engineering, Chuo University()
2nd Author's Name Tadayoshi Enomoto
2nd Author's Affiliation Graduate School of Science and Engineering, Chuo University
Date 2002/2/28
Paper # ICD2001-233
Volume (vol) vol.101
Number (no) 696
Page pp.pp.-
#Pages 8
Date of Issue