Presentation 2002/1/9
Analysis of Relationship between Gate-Lag and Breakdown Phenomena in Recessed-Gate GaAs MMSFETs
Y. MITANI, D. KASAI, A. WAKABAYASHI, K. HORIO,
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Abstract(in English) Two-dimensional numerical analysis of recessed-gate GaAs MESFETs is performed in which surface states and impact ionization of carriers are considered. Effects of surface states and recess structure on the breakdown characteristics are studied. It is also studied how the gate-lag phenomena are influenced by the impact ionization and the recess parameters. It is shown that by introducing the (narrowly) recessed-gate structure, the gate-lag is reduced, but the breakdown voltage is inversely lowered in some cases.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) GaAs MESFET / recessed-gate structure / surface state / gate-lag / breakdown / 2D analysis
Paper # 2001-ED-196,2001-MW-151,2001-ICD-193
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Conference Date 2002/1/9(1days)
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Language JPN
Title (in Japanese) (See Japanese page)
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Title (in English) Analysis of Relationship between Gate-Lag and Breakdown Phenomena in Recessed-Gate GaAs MMSFETs
Sub Title (in English)
Keyword(1) GaAs MESFET
Keyword(2) recessed-gate structure
Keyword(3) surface state
Keyword(4) gate-lag
Keyword(5) breakdown
Keyword(6) 2D analysis
1st Author's Name Y. MITANI
1st Author's Affiliation Faculty of Systems Engineering, Shibaura Institute of Technology()
2nd Author's Name D. KASAI
2nd Author's Affiliation Faculty of Systems Engineering, Shibaura Institute of Technology
3rd Author's Name A. WAKABAYASHI
3rd Author's Affiliation Faculty of Systems Engineering, Shibaura Institute of Technology
4th Author's Name K. HORIO
4th Author's Affiliation Faculty of Systems Engineering, Shibaura Institute of Technology
Date 2002/1/9
Paper # 2001-ED-196,2001-MW-151,2001-ICD-193
Volume (vol) vol.101
Number (no) 555
Page pp.pp.-
#Pages 8
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