Presentation | 2001/11/28 Deep Sub-Micron Interconnects and Expectation to Superconnect Takayasu Sakurai, |
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PDF Download Page | PDF download Page Link |
Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | Superconnect technology which is based on interconnections around 10um design rule is expected to realize new realm of electronic system integration together with System-on-a-Chip approaches. The superconnect technology will be helpful in solving deep submicron (DSM) interconnection issues of VLSI's such as IR voltage drop and RC delay problems. The accumulated knowledge database on board package will be also useful in confronting DSM interconnection issues like inductive effects. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | VLSI / DSM / Interconnect / Superconnect |
Paper # | VLD2001-86,ICD2001-131,CPSY2001-58,FTS2001-33 |
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Conference Information | |
Committee | ICD |
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Conference Date | 2001/11/28(1days) |
Place (in Japanese) | (See Japanese page) |
Place (in English) | |
Topics (in Japanese) | (See Japanese page) |
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Paper Information | |
Registration To | Integrated Circuits and Devices (ICD) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | Deep Sub-Micron Interconnects and Expectation to Superconnect |
Sub Title (in English) | |
Keyword(1) | VLSI |
Keyword(2) | DSM |
Keyword(3) | Interconnect |
Keyword(4) | Superconnect |
1st Author's Name | Takayasu Sakurai |
1st Author's Affiliation | Center for Collaborative Research, and Institute of Industrial Science University of Tokyo() |
Date | 2001/11/28 |
Paper # | VLD2001-86,ICD2001-131,CPSY2001-58,FTS2001-33 |
Volume (vol) | vol.101 |
Number (no) | 469 |
Page | pp.pp.- |
#Pages | 6 |
Date of Issue |