| Presentation | 2001/8/31 Timing Error Analysis in Digital-to-Analog Converter : Effects of Sampling Clock Jitter and Timing Skew(Glitch) Haruo KOBAYASHI, Naoki KUROSAWA, Ikkou MIYAUCHI, Shinya KAWAKAMI, Hideyuki KOGURE, Takanori KOMURO, Hiroshi SAKAYORI, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | This paper decribes two timing nonideality issues of Digital-to-Analog Converters(DACs);sampling clock jitter and clock skew effects.(i)A fornula for output error power due to sampling clock jitter is derived, and this has been validated by numrical simulation;spectrum characteristics of jitter-related noise are also examined.We have also found that when an analog lowpass filter follows the DAC and only the noise power inside the signal band is considered, increasing jitter and increasing input signal frequency degrade the DAC SNR.(ii)The clock timing skew inside the DAC causes glitch impulses.We try to characterize them by simulation and we have found the followings;as the input frequency increases, the effects of the glitch on the DAC SNR decrease. The effects of the gletch due to upper bits on the DAC SNR and SFDR are more Significant than due to lower bits.Also glitch power is mainly located at the odd-multiple frequencies of the input signal. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | DAC / Sanpling / jitter / Clock Skew / Glitch |
| Paper # | ICD200-91 |
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| Committee | ICD |
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| Conference Date | 2001/8/31(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
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| Language | ENG |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Timing Error Analysis in Digital-to-Analog Converter : Effects of Sampling Clock Jitter and Timing Skew(Glitch) |
| Sub Title (in English) | |
| Keyword(1) | DAC |
| Keyword(2) | Sanpling |
| Keyword(3) | jitter |
| Keyword(4) | Clock Skew |
| Keyword(5) | Glitch |
| 1st Author's Name | Haruo KOBAYASHI |
| 1st Author's Affiliation | Electronic Engineerig Department, Gunma University() |
| 2nd Author's Name | Naoki KUROSAWA |
| 2nd Author's Affiliation | Electronic Engineerig Department, Gunma University |
| 3rd Author's Name | Ikkou MIYAUCHI |
| 3rd Author's Affiliation | Electronic Engineerig Department, Gunma University |
| 4th Author's Name | Shinya KAWAKAMI |
| 4th Author's Affiliation | Electronic Engineerig Department, Gunma University |
| 5th Author's Name | Hideyuki KOGURE |
| 5th Author's Affiliation | Electronic Engineerig Department, Gunma University |
| 6th Author's Name | Takanori KOMURO |
| 6th Author's Affiliation | Agilent Technologies Japan, Ltd, Silicon-System Test Division |
| 7th Author's Name | Hiroshi SAKAYORI |
| 7th Author's Affiliation | Agilent Technologies Japan, Ltd, Silucon-System Test Division |
| Date | 2001/8/31 |
| Paper # | ICD200-91 |
| Volume (vol) | vol.101 |
| Number (no) | 282 |
| Page | pp.pp.- |
| #Pages | 8 |
| Date of Issue | |