Presentation 2001/7/27
Technology for High-speed and Low-power microprocessors
Kunio Uchiyama, Takayuki Kawahara, Takehiro Shimizu, Masayuki Miyazaki, Hiroyuki Mizuno,
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Abstract(in English) Frequency, performance, and power consumption of current microprocessors are surveyed, and the problems and solutions to achieve both high-speed and low-power are studied.New approaches, which are the active VBB method, low-power self-instructing method, and chip OS technique, are discussed.
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Keyword(in English) microprocessor / system LSI / back bias / selfinstructing method / OS
Paper # SDM2001-129,ICD2001-52
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Conference Date 2001/7/27(1days)
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Registration To Integrated Circuits and Devices (ICD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Technology for High-speed and Low-power microprocessors
Sub Title (in English)
Keyword(1) microprocessor
Keyword(2) system LSI
Keyword(3) back bias
Keyword(4) selfinstructing method
Keyword(5) OS
1st Author's Name Kunio Uchiyama
1st Author's Affiliation Hitachi, Ltd., Central research labolatory()
2nd Author's Name Takayuki Kawahara
2nd Author's Affiliation Hitachi, Ltd., Central research labolatory
3rd Author's Name Takehiro Shimizu
3rd Author's Affiliation Hitachi, Ltd., Central research labolatory
4th Author's Name Masayuki Miyazaki
4th Author's Affiliation Hitachi, Ltd., Central research labolatory
5th Author's Name Hiroyuki Mizuno
5th Author's Affiliation Hitachi, Ltd., Central research labolatory
Date 2001/7/27
Paper # SDM2001-129,ICD2001-52
Volume (vol) vol.101
Number (no) 249
Page pp.pp.-
#Pages 7
Date of Issue