| Presentation | 2001/5/18 Fast Position Detection Circuit of Objects using Pixel Parallel Architecture Junichi Akita, Akira Watanabe, Osamu Tooyama, Masahiko Yoshimoto, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Integration of photo recepters and signal processing circuit, so called "Vision Chip", is widely studied, but most of them aim at the implementation of noise reduction and edge enhancement, that are useful for generating the visual picture we see, and there are few studies for implementing the function of image recognition. In the application of robot vision, the processing speed of images may often be one of the most serious problem in practical applications. In this paper, we consider the position detection of objects in the visual field as a basic image recognition, and we propose a pixel parallel architecture for fast position detection processing. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Pixel Parallel Architecture / Position Detection / Coordinate Generation / Robot Vision / Vision Chip |
| Paper # | ICD2001-29 |
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| Conference Information | |
| Committee | ICD |
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| Conference Date | 2001/5/18(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
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| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Fast Position Detection Circuit of Objects using Pixel Parallel Architecture |
| Sub Title (in English) | |
| Keyword(1) | Pixel Parallel Architecture |
| Keyword(2) | Position Detection |
| Keyword(3) | Coordinate Generation |
| Keyword(4) | Robot Vision |
| Keyword(5) | Vision Chip |
| 1st Author's Name | Junichi Akita |
| 1st Author's Affiliation | Dept. of Media Architecture, Future University-Hakodate() |
| 2nd Author's Name | Akira Watanabe |
| 2nd Author's Affiliation | Dept. of Electrical Enginnering, Kanazawa University |
| 3rd Author's Name | Osamu Tooyama |
| 3rd Author's Affiliation | Dept. of Electrical Enginnering, Kanazawa University |
| 4th Author's Name | Masahiko Yoshimoto |
| 4th Author's Affiliation | Dept. of Electrical Enginnering, Kanazawa University |
| Date | 2001/5/18 |
| Paper # | ICD2001-29 |
| Volume (vol) | vol.101 |
| Number (no) | 85 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |