| Presentation | 2001/3/2 Evaluation Using Transfer Function and Analysis of Power Supply Noise S. Sugiyama, M. Ikeda, K. Asada, H. Aoki, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | With increasing interconnect densities, voltage bounce noise in power supply lines is becoming to an important problem. In this paper we present a new methodology for the evaluation of power supply noise, caused by digital switching activity. Utilizing matrix-tranfer function and power spectrum and focusing on the average noise, this method enables analysis of the chip level power supply noise in reasonable analysis time. To verify this method, we designed and fabricated VLSI test structure to measure the noise in the power supply lines. Since the circuit is designed to output results as digital value using a voltage comparator of sampling method, the noise mixed during the measurement is considered smaller than analog methods. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | VLSI / power supply noise / transfer function / comparator / simulation |
| Paper # | VLD2000-144,ICD2000-220 |
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| Conference Information | |
| Committee | ICD |
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| Conference Date | 2001/3/2(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Evaluation Using Transfer Function and Analysis of Power Supply Noise |
| Sub Title (in English) | |
| Keyword(1) | VLSI |
| Keyword(2) | power supply noise |
| Keyword(3) | transfer function |
| Keyword(4) | comparator |
| Keyword(5) | simulation |
| 1st Author's Name | S. Sugiyama |
| 1st Author's Affiliation | Department of Electronic Engineering, University of Tokyo:VLSI Design and Education Center, University of Tokyo() |
| 2nd Author's Name | M. Ikeda |
| 2nd Author's Affiliation | Department of Electronic Engineering, University of Tokyo:VLSI Design and Education Center, University of Tokyo |
| 3rd Author's Name | K. Asada |
| 3rd Author's Affiliation | Department of Electronic Engineering, University of Tokyo:VLSI Design and Education Center, University of Tokyo |
| 4th Author's Name | H. Aoki |
| 4th Author's Affiliation | Department of Electronic Engineering, University of Tokyo:VLSI Design and Education Center, University of Tokyo |
| Date | 2001/3/2 |
| Paper # | VLD2000-144,ICD2000-220 |
| Volume (vol) | vol.100 |
| Number (no) | 648 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |