| Presentation | 2001/3/2 A Hardware/Software Partitioning System for System LSIs Ryunosuke ODA, Shinpei ISODA, Nozomu TOGAWA, Masayoshi TACHIBANA, Masao YANAGISAWA, Tatsuo OHTSUKI, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | This paper proposes a hardware/software partitioning system for system LSIs. The system is composed of an architecture database and an implementation binder. The database associates an algorithm name with implementation cases. Input of the implementation binder is an application modeled by a functional block diagram and a constraint of its execution time. The diagram consists of functional modules and their connections. Each module has an algorithm name. The binder enumerates more than one module-case bindings, all of which meet the given time constraint. We apply the system to MPEG-4 encoder and the results demonstrate its effectiveness and efficiency. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | hardware/software partitioning / architecuture database / CAD / system LSI / MPEG-4 |
| Paper # | VLD2000-140,ICD2000-216 |
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| Conference Information | |
| Committee | ICD |
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| Conference Date | 2001/3/2(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Hardware/Software Partitioning System for System LSIs |
| Sub Title (in English) | |
| Keyword(1) | hardware/software partitioning |
| Keyword(2) | architecuture database |
| Keyword(3) | CAD |
| Keyword(4) | system LSI |
| Keyword(5) | MPEG-4 |
| 1st Author's Name | Ryunosuke ODA |
| 1st Author's Affiliation | Dept. of Electronics, Information and Communication Engineering, Waseda University() |
| 2nd Author's Name | Shinpei ISODA |
| 2nd Author's Affiliation | Dept. of Electronics, Information and Communication Engineering, Waseda University |
| 3rd Author's Name | Nozomu TOGAWA |
| 3rd Author's Affiliation | Advanced Research Institute for Science and Engineering, Kochi University of Technology |
| 4th Author's Name | Masayoshi TACHIBANA |
| 4th Author's Affiliation | Dept. of Electronic and Photonic Systems Engineering, Waseda University |
| 5th Author's Name | Masao YANAGISAWA |
| 5th Author's Affiliation | Dept. of Electronics, Information and Communication Engineering, Waseda University |
| 6th Author's Name | Tatsuo OHTSUKI |
| 6th Author's Affiliation | Dept. of Electronics, Information and Communication Engineering, Waseda University |
| Date | 2001/3/2 |
| Paper # | VLD2000-140,ICD2000-216 |
| Volume (vol) | vol.100 |
| Number (no) | 648 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |