| Presentation | 2001/3/1 Multi-Step Improved-Breaking-Off-Search Motion Estimation Algorithm with 4:1 Search and Low-bit Resolution, and CMOS Motion Estimation LSI J. Matsumoto, A. Kotabe, T. Horiguchi, T. Enomoto, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | To drastically reduce the power dissipation, P, of a motion estimator LSI, a fast motion estimation (ME) algorithm called the "multi-step improved breaking-off-search (M-IBOS)" algorithm with 4:1 search and low-bit resolution (4bit/pixel)" has been developed. M-IBOS can improve the processing speed of a full search algorithm by a factor of more than 13, while achieving the same visual quality. A new 0.13-μm CMOS accumulation-type ME circuit for M-IBOS has been designed. P is reduced to 3.35μW, which is less than 1/790 that of the previously developed 0.13-μm CMOS Wallace-tree ME circuit. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | motion vector estimation / power dissipation / motion picture / breaking-off-search / multi-step improved-breaking-off-search / CMOS technology |
| Paper # | VLD2000-128,ICD2000-204 |
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| Conference Information | |
| Committee | ICD |
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| Conference Date | 2001/3/1(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
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| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Multi-Step Improved-Breaking-Off-Search Motion Estimation Algorithm with 4:1 Search and Low-bit Resolution, and CMOS Motion Estimation LSI |
| Sub Title (in English) | |
| Keyword(1) | motion vector estimation |
| Keyword(2) | power dissipation |
| Keyword(3) | motion picture |
| Keyword(4) | breaking-off-search |
| Keyword(5) | multi-step improved-breaking-off-search |
| Keyword(6) | CMOS technology |
| 1st Author's Name | J. Matsumoto |
| 1st Author's Affiliation | Graduate School of Science & Engineering, Chuo University() |
| 2nd Author's Name | A. Kotabe |
| 2nd Author's Affiliation | Graduate School of Science & Engineering, Chuo University |
| 3rd Author's Name | T. Horiguchi |
| 3rd Author's Affiliation | Graduate School of Science & Engineering, Chuo University |
| 4th Author's Name | T. Enomoto |
| 4th Author's Affiliation | Graduate School of Science & Engineering, Chuo University |
| Date | 2001/3/1 |
| Paper # | VLD2000-128,ICD2000-204 |
| Volume (vol) | vol.100 |
| Number (no) | 647 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |