| Presentation | 2001/1/11 High Efficiency Power Amplifier Module with Novel Enhancement-Mode Heterojunction FETs for Wide-Band CDMA Handsets Yasunori Bito, Takehiko Kato, Teruhisa Kato, Naotaka Iwata, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | A 0.1cc highly efficient power amplitie multi chip module (MCM) employing novel enhancement-mode double-doped AlGaAs/InGaAs/AlGaAs heterojunction FETs (HJFET) has been successfully developed for 1.9GHz wide-band CDMA (W=CDMA) handsets. The HJFET has a 5nm thickness Al_<0.5>Ga_<0.5>As barrier layer for improving a gate forward turn-on voltage. It was also optimized with thickness of upper and lower Al_<0.2>Ga_<0.8>As electron supply layers to obtain a high maximum drain current. Under single 3.5V operation, the two-stage power amplifier MCM exhibited 26.0dBm output power, a record 47.2% power-added efficiency (PAE) and 22.3dB associated gain at W-CDMA distortion criteria. Even operated at a reducated the developed MCM is promising for W-CDMA handsets. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | W-CDMA / MCM / Enhancement-mode HJFET / Gate turn-on voltage / Al_<0.5>Ga_<0.5>As barrier layer |
| Paper # | ED2000-230,MW2000-179,ICD2000-190 |
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| Conference Information | |
| Committee | ICD |
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| Conference Date | 2001/1/11(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
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| Assistant | |
| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | High Efficiency Power Amplifier Module with Novel Enhancement-Mode Heterojunction FETs for Wide-Band CDMA Handsets |
| Sub Title (in English) | |
| Keyword(1) | W-CDMA |
| Keyword(2) | MCM |
| Keyword(3) | Enhancement-mode HJFET |
| Keyword(4) | Gate turn-on voltage |
| Keyword(5) | Al_<0.5>Ga_<0.5>As barrier layer |
| 1st Author's Name | Yasunori Bito |
| 1st Author's Affiliation | Compound Semiconductor Device Division, NEC Corporation() |
| 2nd Author's Name | Takehiko Kato |
| 2nd Author's Affiliation | Compound Semiconductor Device Division, NEC Corporation |
| 3rd Author's Name | Teruhisa Kato |
| 3rd Author's Affiliation | Naito Densei Machida Mfg. Co., Ltd. |
| 4th Author's Name | Naotaka Iwata |
| 4th Author's Affiliation | Compound Semiconductor Device Division, NEC Corporation |
| Date | 2001/1/11 |
| Paper # | ED2000-230,MW2000-179,ICD2000-190 |
| Volume (vol) | vol.100 |
| Number (no) | 554 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |