| Presentation | 2000/1/19 Analysis of Gate-Lag Phenomena in Recessed-Gate and Buried-Gate GaAs MESFETs A. Wakabayashi, Y. Mitani, K. Horio, |
||
|---|---|---|---|
| PDF Download Page | PDF download Page Link | ||
| Abstract(in Japanese) | (See Japanese page) | ||
| Abstract(in English) | We have made two-dimensional simulation of turn-on characteristics in recessed-gate and buried-gate GaAs MESFETs, and studied how the gate-lag (which may occur mainly due to surface states) is affected by the structural parameters and the off-state gate voltage V_| , the gate-lag could be greatly reduced by introducing the buried-gate structure. However, it is suggested that the large gate-lag might be seen when V_ | . | |
| Keyword(in Japanese) | (See Japanese page) | ||
| Keyword(in English) | GaAs MESFET / gate lag / recessed-gate structure / buried-gate structure / surface state / device simulation | ||
| Paper # | ED99-260,MW99-184,ICD99-235 | ||
| Date of Issue |
| Conference Information | |
| Committee | ICD |
|---|---|
| Conference Date | 2000/1/19(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
|---|---|
| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Analysis of Gate-Lag Phenomena in Recessed-Gate and Buried-Gate GaAs MESFETs |
| Sub Title (in English) | |
| Keyword(1) | GaAs MESFET |
| Keyword(2) | gate lag |
| Keyword(3) | recessed-gate structure |
| Keyword(4) | buried-gate structure |
| Keyword(5) | surface state |
| Keyword(6) | device simulation |
| 1st Author's Name | A. Wakabayashi |
| 1st Author's Affiliation | Faculty of Systems Engineering, Shibaura Institute of Technology() |
| 2nd Author's Name | Y. Mitani |
| 2nd Author's Affiliation | Faculty of Systems Engineering, Shibaura Institute of Technology |
| 3rd Author's Name | K. Horio |
| 3rd Author's Affiliation | Faculty of Systems Engineering, Shibaura Institute of Technology |
| Date | 2000/1/19 |
| Paper # | ED99-260,MW99-184,ICD99-235 |
| Volume (vol) | vol.99 |
| Number (no) | 559 |
| Page | pp.pp.- |
| #Pages | 7 |
| Date of Issue | |