Presentation 1999/8/26
Simulation of FN Tunneling Currents Including Realistic Structure of Gate Electrode
K. Matsuzawa, H. Hazama, H. Tanimoto,
PDF Download Page PDF download Page Link
Abstract(in Japanese) (See Japanese page)
Abstract(in English) Probability of FN tunneling was calculated by detecting tunneling path between each point in gate oxide and gate electrode, based on parabolic shape potential and the WKB approximation. For a realistic gate structure of a MOSFET, simulation results by the present approach were smaller than those by the constant field model, which was due to non-uniform distribution of electric field in the gate oxide. Moreover, using the present approach, detail distribtttion of carriers generated by the FN tunneling in the gate oxide is demonstrated.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) FN tunneling / simulatnon
Paper # ICD99-129
Date of Issue

Conference Information
Committee ICD
Conference Date 1999/8/26(1days)
Place (in Japanese) (See Japanese page)
Place (in English)
Topics (in Japanese) (See Japanese page)
Topics (in English)
Vice Chair

Paper Information
Registration To Integrated Circuits and Devices (ICD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Simulation of FN Tunneling Currents Including Realistic Structure of Gate Electrode
Sub Title (in English)
Keyword(1) FN tunneling
Keyword(2) simulatnon
1st Author's Name K. Matsuzawa
1st Author's Affiliation Advanced LSI Technology Laboratory, Toshiba Corporation()
2nd Author's Name H. Hazama
2nd Author's Affiliation Microelectronics Engineering Laboratory, Toshiba Corporation
3rd Author's Name H. Tanimoto
3rd Author's Affiliation
Date 1999/8/26
Paper # ICD99-129
Volume (vol) vol.99
Number (no) 265
Page pp.pp.-
#Pages 6
Date of Issue