| Presentation | 1999/4/16 A Technique for CPLD Implementation of Large AND-OR Representations Ken'ichiro HIGASHI, Yukihiro IGUCHI, Teruhiko YAMADA, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | CPLDs consist of multiple PLA blocks with a strict architecture's capacity. So, we cannot directly implement a logic function with a higher capacity than that of the PLA block. This paper presents a device-fitting-oriented decomposition technique for implementing large AND-OR representations in CPLDs. Preliminary experiments show that our method is more useful than MAX+plus II on the market. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | CPTD / PLA / Decomposition |
| Paper # | ICD99-18 |
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| Conference Information | |
| Committee | ICD |
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| Conference Date | 1999/4/16(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
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| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Technique for CPLD Implementation of Large AND-OR Representations |
| Sub Title (in English) | |
| Keyword(1) | CPTD |
| Keyword(2) | PLA |
| Keyword(3) | Decomposition |
| 1st Author's Name | Ken'ichiro HIGASHI |
| 1st Author's Affiliation | Dept. of Computer Science, Meiji University() |
| 2nd Author's Name | Yukihiro IGUCHI |
| 2nd Author's Affiliation | Dept. of Computer Science, Meiji University |
| 3rd Author's Name | Teruhiko YAMADA |
| 3rd Author's Affiliation | Dept. of Computer Science, Meiji University |
| Date | 1999/4/16 |
| Paper # | ICD99-18 |
| Volume (vol) | vol.99 |
| Number (no) | 4 |
| Page | pp.pp.- |
| #Pages | 8 |
| Date of Issue | |