Presentation 1999/4/16
A Design Optimization Method for Fine-grained Asynchronous Pipeline
Motokazu OZAWA, Susumu ISHIYAMA, Hiroshi NAKAMURA, Takashi NANYA,
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Abstract(in English) Performance of asynchronous pipeline system degrades due to the overhead of request-acknowledge control and idle phase. Fine-grained pipeline is the method for hiding these pipeline overhead. In the fine-grained pipeline, a stage of pipeline is divided by latches which does not have token initially. Functional operation within a divided sub stage and control operation (including request-acknowledge control and idle phase operation) are executed in parallel. In this paper, we propose a design method for maximize the performance of fine-grained pipeline and describe simulation results of sample DCVSL pipeline designed by proposed method.
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Keyword(in English) asynchronous circuit / pipeline / performance optimization
Paper # ICD99-10
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Conference Date 1999/4/16(1days)
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Registration To Integrated Circuits and Devices (ICD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) A Design Optimization Method for Fine-grained Asynchronous Pipeline
Sub Title (in English)
Keyword(1) asynchronous circuit
Keyword(2) pipeline
Keyword(3) performance optimization
1st Author's Name Motokazu OZAWA
1st Author's Affiliation Reserch Center for Advanced Science and Technology, Tokyo University()
2nd Author's Name Susumu ISHIYAMA
2nd Author's Affiliation Reserch Center for Advanced Science and Technology, Tokyo University
3rd Author's Name Hiroshi NAKAMURA
3rd Author's Affiliation Reserch Center for Advanced Science and Technology, Tokyo University
4th Author's Name Takashi NANYA
4th Author's Affiliation Reserch Center for Advanced Science and Technology, Tokyo University
Date 1999/4/16
Paper # ICD99-10
Volume (vol) vol.99
Number (no) 4
Page pp.pp.-
#Pages 8
Date of Issue