Presentation 1994/11/24
Built-in Self Test Based on Chaotic Phenomena
Takeshi Kawashima, Hiroaki Tanaka, Shigeyuki Akita, Tadashi Hatori,
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Abstract(in English) We propose a Built-in Self Test method for the logical combinational circuit based on chaotic phenomena.A test circuit is added to the CUT so that the feedback system which consists of the test circuit and the CUT shows chaotic behavior.This chaotic behavior guarantees that the generated test signals are random patterns,and that this patterns contain the information about afl the errors detected throughout test.The proposed method can reduce the area overhead without losing fault coverage compared with existing methods such as LFSR's and signature registers.This method is applied to an experimental 16bit-binary-multiplier,and overhead is about one third of that of existing methods.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Built-in self Test / Chaos / Feedback system / Random patterns
Paper # ICD94-139
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Conference Date 1994/11/24(1days)
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Registration To Integrated Circuits and Devices (ICD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Built-in Self Test Based on Chaotic Phenomena
Sub Title (in English)
Keyword(1) Built-in self Test
Keyword(2) Chaos
Keyword(3) Feedback system
Keyword(4) Random patterns
1st Author's Name Takeshi Kawashima
1st Author's Affiliation Research Laboratories,Nippondenso()
2nd Author's Name Hiroaki Tanaka
2nd Author's Affiliation Research Laboratories,Nippondenso
3rd Author's Name Shigeyuki Akita
3rd Author's Affiliation Research Laboratories,Nippondenso
4th Author's Name Tadashi Hatori
4th Author's Affiliation Research Laboratories,Nippondenso
Date 1994/11/24
Paper # ICD94-139
Volume (vol) vol.94
Number (no) 360
Page pp.pp.-
#Pages 8
Date of Issue