| Presentation | 1994/10/21 Digital Signal Processor Supporting 2 Types of Instruction Sets Atsushi Kiuchi, Tetsuya Nakagawa, Kenji Kaneko, Toru Baji, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | The ASIC requires flexible data precision and memory space for digital signal processing area.This paper will propose a DSP architecture which makes it easy to modify not only peripherals but DSP core.This DSP supports 2 types of instruction sets,called DSP type and RISC type.RISC type instructions are comfortable to support C compiler,so the house keeping process can be easily performed using C.DSP type instructions are supported in order to execute plural operation in parallel.An evaluation chip was made to confirm the performance.A product version will be released soon. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Digital Signal Processing / DSP / Architecture / Instruction Set / Variable Length Type Code |
| Paper # | ICD94-132,DSP94-88 |
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| Conference Information | |
| Committee | ICD |
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| Conference Date | 1994/10/21(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Digital Signal Processor Supporting 2 Types of Instruction Sets |
| Sub Title (in English) | |
| Keyword(1) | Digital Signal Processing |
| Keyword(2) | DSP |
| Keyword(3) | Architecture |
| Keyword(4) | Instruction Set |
| Keyword(5) | Variable Length Type Code |
| 1st Author's Name | Atsushi Kiuchi |
| 1st Author's Affiliation | Central Research Laboratory,Hitachi() |
| 2nd Author's Name | Tetsuya Nakagawa |
| 2nd Author's Affiliation | Central Research Laboratory,Hitachi |
| 3rd Author's Name | Kenji Kaneko |
| 3rd Author's Affiliation | Central Research Laboratory,Hitachi |
| 4th Author's Name | Toru Baji |
| 4th Author's Affiliation | Semiconductor IC Division,Hitachi |
| Date | 1994/10/21 |
| Paper # | ICD94-132,DSP94-88 |
| Volume (vol) | vol.94 |
| Number (no) | 288 |
| Page | pp.pp.- |
| #Pages | 8 |
| Date of Issue | |