| Presentation | 1994/6/24 155Mbps ATM/AAL 3/4/5 Protocol Processing LSI Yasuo Unekawa, Kohei Abe, Shin'ichi Mizuguchi, Keiko Seki, Kenji Sakaue, Yuichi Miyazawa, Koichi Tanaka, Akira Kanuma, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | ATM, AAL protocol processing LSI chip set consisting of ATMCT transmitter chip and ATMCR receiver chip has been developed for use in ATM switch fabric or ATM terminals.They can handle ATM and AAL 3/4/5 processing of up to 64K connections at 155,52 Mbps transmission rate concurrently.The ratio of average performance to peak performance at the maximum frame length is 97% for ATMCT and 95% for ATMCR,ATMCT has functions of average cell rate and peak cell rate control.They have also buffer management function on chip in order to reduce the load of host CPU. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | ATM / AAL3/ / AAL5 / protocol processing / buffer management / traffic shaping |
| Paper # | ICD94-69 |
| Date of Issue |
| Conference Information | |
| Committee | ICD |
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| Conference Date | 1994/6/24(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | 155Mbps ATM/AAL 3/4/5 Protocol Processing LSI |
| Sub Title (in English) | |
| Keyword(1) | ATM |
| Keyword(2) | AAL3/ |
| Keyword(3) | AAL5 |
| Keyword(4) | protocol processing |
| Keyword(5) | buffer management |
| Keyword(6) | traffic shaping |
| 1st Author's Name | Yasuo Unekawa |
| 1st Author's Affiliation | Semiconductor Device Engineering Laboratory,Toshiba Corporation() |
| 2nd Author's Name | Kohei Abe |
| 2nd Author's Affiliation | Semiconductor Device Engineering Laboratory,Toshiba Corporation |
| 3rd Author's Name | Shin'ichi Mizuguchi |
| 3rd Author's Affiliation | Semiconductor System Engineering Center,Toshiba Corporation |
| 4th Author's Name | Keiko Seki |
| 4th Author's Affiliation | Toshiba Microelectronics Corporation |
| 5th Author's Name | Kenji Sakaue |
| 5th Author's Affiliation | Toshiba Microelectronics Corporation |
| 6th Author's Name | Yuichi Miyazawa |
| 6th Author's Affiliation | Semiconductor Device Engineering Laboratory,Toshiba Corporation |
| 7th Author's Name | Koichi Tanaka |
| 7th Author's Affiliation | Semiconductor Device Engineering Laboratory,Toshiba Corporation |
| 8th Author's Name | Akira Kanuma |
| 8th Author's Affiliation | Semiconductor Device Engineering Laboratory,Toshiba Corporation |
| Date | 1994/6/24 |
| Paper # | ICD94-69 |
| Volume (vol) | vol.94 |
| Number (no) | 125 |
| Page | pp.pp.- |
| #Pages | 8 |
| Date of Issue | |