| Presentation | 1994/6/24 Efficient Self-timed Queue Architecture for a shared-buffering ATM Switch Masahiko Ishiwaki, Hideaki Yamanaka, Harufusa Kondoh, Hirotaka Saito, Yoshio Matsuda, Masao Nakaya, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | A new approach to implement queues for address controlling of a shared-buffering ATM Switch is presented.We combined a self-timed FIFO with a search circuit that finds the earliest entry for each output port.Using this architecture,queues provided for each output port can be effectively realized by a single FIFO.The delay priority and multicasting are supported without doubling the number of the queues.If we load this new FIFO with ATM cells instead of address,the FIFO itself can work as an ATM Switch. Evaluation chip was fabricated using 0.5-μm CMOS process technolog y.Inter-stage transfer speed over 500 MHz and cycle time over 125 MHz were obtained. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | ATM / ATM switch / shared buffer / queue |
| Paper # | ICD94-67 |
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| Conference Information | |
| Committee | ICD |
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| Conference Date | 1994/6/24(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Vice Chair | |
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| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Efficient Self-timed Queue Architecture for a shared-buffering ATM Switch |
| Sub Title (in English) | |
| Keyword(1) | ATM |
| Keyword(2) | ATM switch |
| Keyword(3) | shared buffer |
| Keyword(4) | queue |
| 1st Author's Name | Masahiko Ishiwaki |
| 1st Author's Affiliation | System LSI Laboratory,Mitsubishi Electric Corporation() |
| 2nd Author's Name | Hideaki Yamanaka |
| 2nd Author's Affiliation | Communication Systems Laboratory,Mitsubishi Electric Corporation |
| 3rd Author's Name | Harufusa Kondoh |
| 3rd Author's Affiliation | System LSI Laboratory,Mitsubishi Electric Corporation |
| 4th Author's Name | Hirotaka Saito |
| 4th Author's Affiliation | Communication Systems Laboratory,Mitsubishi Electric Corporation |
| 5th Author's Name | Yoshio Matsuda |
| 5th Author's Affiliation | System LSI Laboratory,Mitsubishi Electric Corporation |
| 6th Author's Name | Masao Nakaya |
| 6th Author's Affiliation | System LSI Laboratory,Mitsubishi Electric Corporation |
| Date | 1994/6/24 |
| Paper # | ICD94-67 |
| Volume (vol) | vol.94 |
| Number (no) | 125 |
| Page | pp.pp.- |
| #Pages | 7 |
| Date of Issue | |