Presentation 1994/8/25
A Video DSP for Realtime MPEG2 CODEC
Hisashi Kodama, Eiji Miyagosi, Kiyoshi Okamoto, Masahiro Gion, Takayuki Minemaru, Akihiko Ohtani, Masaki Toyokura, Toshiyuki Araki, Kunitoshi Aono, Hiroshi Takeno, Toshihide Akiyama, Brent Wilson,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) A video DSP with a macroblock-level-pipeline and a SIMD type vector-pipeline architecture(VDSP2)has been developed,using 0.5-μm triple-layer-metal CMOS technology.This 17.00-mm × 15.00-mm chip consists of 2.5-Mega transistors,and operates at maximam 100MHZ. The real-time encoder and decoder specified in the MPEG2 can be realized with two VDSP2′s and a ME unit,and one VDSP2,respectively ,at an 80MHz clock rate,with a power disspation of 4.2W at 3.3V.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) MPEG2 / Image Compression and Decompression / DSP / Motion Estimation / Codec
Paper # ICD94-82
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Conference Date 1994/8/25(1days)
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Paper Information
Registration To Integrated Circuits and Devices (ICD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) A Video DSP for Realtime MPEG2 CODEC
Sub Title (in English)
Keyword(1) MPEG2
Keyword(2) Image Compression and Decompression
Keyword(3) DSP
Keyword(4) Motion Estimation
Keyword(5) Codec
1st Author's Name Hisashi Kodama
1st Author's Affiliation Semiconductor Research Center,Matsushita Electric Industrial()
2nd Author's Name Eiji Miyagosi
2nd Author's Affiliation Semiconductor Research Center,Matsushita Electric Industrial
3rd Author's Name Kiyoshi Okamoto
3rd Author's Affiliation Semiconductor Research Center,Matsushita Electric Industrial
4th Author's Name Masahiro Gion
4th Author's Affiliation Semiconductor Research Center,Matsushita Electric Industrial
5th Author's Name Takayuki Minemaru
5th Author's Affiliation Semiconductor Research Center,Matsushita Electric Industrial
6th Author's Name Akihiko Ohtani
6th Author's Affiliation Semiconductor Research Center,Matsushita Electric Industrial
7th Author's Name Masaki Toyokura
7th Author's Affiliation Semiconductor Research Center,Matsushita Electric Industrial
8th Author's Name Toshiyuki Araki
8th Author's Affiliation Semiconductor Research Center,Matsushita Electric Industrial
9th Author's Name Kunitoshi Aono
9th Author's Affiliation Semiconductor Research Center,Matsushita Electric Industrial
10th Author's Name Hiroshi Takeno
10th Author's Affiliation Audio Video Information Technology Laboratory,Matsushita Electric Industrial
11th Author's Name Toshihide Akiyama
11th Author's Affiliation Audio Video Information Technology Laboratory,Matsushita Electric Industrial
12th Author's Name Brent Wilson
12th Author's Affiliation Asia Matsushita Electric
Date 1994/8/25
Paper # ICD94-82
Volume (vol) vol.94
Number (no) 203
Page pp.pp.-
#Pages 8
Date of Issue