| Presentation | 1999/3/5 A Low-skew Ring-type Clock Distribution Circuits Atsufumi Shibayama, Masayuki Mizuno, Hitoshi Abiko, Akira Matsumoto, Yoetsu Nakazawa, Masakatsu Yamashina, |
|---|---|
| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Clock skew and jitter is becoming the major obstacle in achieving high-frequency clock distribution is sub-quarter micron CMOS LSIs, because of device and operating environment deviations. To overcome this obstacle, we have developed a low-skew ring-type clock distribution circuits for over 1 GHz synchronization. The circuits enable dynamic compensation for device and operating environment deviations. A 1-GHz clock test chip implementing the circuits is fabricated with 0.18μm CMOS technology and successfully operated. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Clock distribution / clock skew / clock jitter / delay-locked loop / variable delay line / phase detector |
| Paper # | ICD98-296 |
| Date of Issue |
| Conference Information | |
| Committee | ICD |
|---|---|
| Conference Date | 1999/3/5(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
|---|---|
| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Low-skew Ring-type Clock Distribution Circuits |
| Sub Title (in English) | |
| Keyword(1) | Clock distribution |
| Keyword(2) | clock skew |
| Keyword(3) | clock jitter |
| Keyword(4) | delay-locked loop |
| Keyword(5) | variable delay line |
| Keyword(6) | phase detector |
| 1st Author's Name | Atsufumi Shibayama |
| 1st Author's Affiliation | Silicon Systems Research Laboratories,NEC Corporation() |
| 2nd Author's Name | Masayuki Mizuno |
| 2nd Author's Affiliation | Silicon Systems Research Laboratories,NEC Corporation |
| 3rd Author's Name | Hitoshi Abiko |
| 3rd Author's Affiliation | ULSI Device Development Laboratories,NEC Corporation |
| 4th Author's Name | Akira Matsumoto |
| 4th Author's Affiliation | ULSI Device Development Laboratories,NEC Corporation |
| 5th Author's Name | Yoetsu Nakazawa |
| 5th Author's Affiliation | Silicon Systems Research Laboratories,NEC Corporation |
| 6th Author's Name | Masakatsu Yamashina |
| 6th Author's Affiliation | Silicon Systems Research Laboratories,NEC Corporation |
| Date | 1999/3/5 |
| Paper # | ICD98-296 |
| Volume (vol) | vol.98 |
| Number (no) | 627 |
| Page | pp.pp.- |
| #Pages | 8 |
| Date of Issue | |