Presentation 1999/3/4
Acceleration of Linear Block Code Evaluations Using Reconfigurable Hardware
Hidehisa Nagano, Takayuki Suyama, Akira Nagoya,
PDF Download Page PDF download Page Link
Abstract(in Japanese) (See Japanese page)
Abstract(in English) This paper presents an approach for executing applications using reconfigurable computing(RC). Our RC approach is achieved by effective use of design automation systems. Logic circuits specialized for each individual application task are automatically implemented on reconfigurable hardware like FPGAs. Such circuits can quickly perform tasks that are time-consuming for general purpose computers. Decoding of binary linear block codes for the evaluation is taken up as an example application. Experimental results show that thetime for decoding of the code specific decoding circuit implemented on reconfigurable hard ware, in which computations are executed in parallel, is much shorter than that of the sortware decoder.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) reconfigurable hardware / reconfigurable computing / logic synthesis / linear block code
Paper # ICD-98-290
Date of Issue

Conference Information
Committee ICD
Conference Date 1999/3/4(1days)
Place (in Japanese) (See Japanese page)
Place (in English)
Topics (in Japanese) (See Japanese page)
Topics (in English)
Chair
Vice Chair
Secretary
Assistant

Paper Information
Registration To Integrated Circuits and Devices (ICD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Acceleration of Linear Block Code Evaluations Using Reconfigurable Hardware
Sub Title (in English)
Keyword(1) reconfigurable hardware
Keyword(2) reconfigurable computing
Keyword(3) logic synthesis
Keyword(4) linear block code
1st Author's Name Hidehisa Nagano
1st Author's Affiliation NTT Communication Science Laboratories()
2nd Author's Name Takayuki Suyama
2nd Author's Affiliation NTT West Provisional Headquarters Research and Development Center
3rd Author's Name Akira Nagoya
3rd Author's Affiliation NTT Communication Science Laboratories
Date 1999/3/4
Paper # ICD-98-290
Volume (vol) vol.98
Number (no) 626
Page pp.pp.-
#Pages 8
Date of Issue