| Presentation | 1999/3/4 A Dynamic Reconfigurable System Based on Multiple FPGAs and Its Applications Yohei HASEGAWA, Nozomu TOGAWA, Masao YANAGISAWA, Tatsuo OHTSUKI, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | An FPGA is a reconfigurable device on which users realize their own logic circuits rapidly. A flexible hardware system can be designed based on FPGAs. Recently, there has been proposed a dynamic reconfigurable System Where a part of the system can be reconfigured while executing an application program. This paper proposes a dynamic reconfigurable system mFPS2 for fast digital signal processing. mFPS2 consists of four FPGAs, two of them Can be dynamically reconfigured. Therefore a large application program exceeding the size of Physical hardware resources will be efficiently implemented on mFPS2. A JPEG encoder has been implemented on mFPS2 and experimental results show that mFPS2 executes the JPEG encoder two times faster than a software process on a workstation. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | FPGA / reconfigurable system / dynamic reconfiguration / digital signal processing / image processing |
| Paper # | ICD-98-289 |
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| Conference Information | |
| Committee | ICD |
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| Conference Date | 1999/3/4(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
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| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Dynamic Reconfigurable System Based on Multiple FPGAs and Its Applications |
| Sub Title (in English) | |
| Keyword(1) | FPGA |
| Keyword(2) | reconfigurable system |
| Keyword(3) | dynamic reconfiguration |
| Keyword(4) | digital signal processing |
| Keyword(5) | image processing |
| 1st Author's Name | Yohei HASEGAWA |
| 1st Author's Affiliation | Dept.of Electronics,Information and Communication Engineering Waseda University() |
| 2nd Author's Name | Nozomu TOGAWA |
| 2nd Author's Affiliation | Dept.of Electronics,Information and Communication Engineering Waseda University |
| 3rd Author's Name | Masao YANAGISAWA |
| 3rd Author's Affiliation | Dept.of Electronics,Information and Communication Engineering Waseda University |
| 4th Author's Name | Tatsuo OHTSUKI |
| 4th Author's Affiliation | Dept.of Electronics,Information and Communication Engineering Waseda University |
| Date | 1999/3/4 |
| Paper # | ICD-98-289 |
| Volume (vol) | vol.98 |
| Number (no) | 626 |
| Page | pp.pp.- |
| #Pages | 8 |
| Date of Issue | |