| Presentation | 1999/1/21 Single 3-V Supply Operation 5.8-GHz GaAs Linear Power MESFET Amplifier Yoshiko Ikeda, Masami Nagaoka, Hirotsugu Wakimoto, Toshiki Seshita, Masakatsu Mihara, Misao Yoshimura, Yoshikazu Tanabe, Keiji Ooya, Yoshiaki Kitaura, Naotaka Uchitomi, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | A GaAs power amplifier operating with a single 3-V supply has been developed for 5.8-GHz ISM band applications. It is composed of two kinds of refractory WNx/W self-aligned gate MESFETs : a highly-efficient, linear P-pocket MESFET and a high-gain asymmetric Buried P-layer(BP)-MESFET. The power amplifier exhibits a power gain of 17.9 dB and a power-added efficiency of 25.7% with an output power of 18.7 dBm at the 1-dB compression point. This self-aligned gate GaAs MESFET technology is promising for near-future 5.8-GHz applications, because of such good power performance and good producibility. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Gallium arsenide / Linear power amplifier / MMIC / Self-aligned gate / MESFET / Single supply |
| Paper # | ED98-206,MW98-169,ICD98-273 |
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| Conference Information | |
| Committee | ICD |
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| Conference Date | 1999/1/21(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Single 3-V Supply Operation 5.8-GHz GaAs Linear Power MESFET Amplifier |
| Sub Title (in English) | |
| Keyword(1) | Gallium arsenide |
| Keyword(2) | Linear power amplifier |
| Keyword(3) | MMIC |
| Keyword(4) | Self-aligned gate |
| Keyword(5) | MESFET |
| Keyword(6) | Single supply |
| 1st Author's Name | Yoshiko Ikeda |
| 1st Author's Affiliation | Research and Development Center, Toshiba Corp.() |
| 2nd Author's Name | Masami Nagaoka |
| 2nd Author's Affiliation | Research and Development Center, Toshiba Corp. |
| 3rd Author's Name | Hirotsugu Wakimoto |
| 3rd Author's Affiliation | Research and Development Center, Toshiba Corp. |
| 4th Author's Name | Toshiki Seshita |
| 4th Author's Affiliation | Research and Development Center, Toshiba Corp. |
| 5th Author's Name | Masakatsu Mihara |
| 5th Author's Affiliation | Research and Development Center, Toshiba Corp. |
| 6th Author's Name | Misao Yoshimura |
| 6th Author's Affiliation | Research and Development Center, Toshiba Corp. |
| 7th Author's Name | Yoshikazu Tanabe |
| 7th Author's Affiliation | Research and Development Center, Toshiba Corp. |
| 8th Author's Name | Keiji Ooya |
| 8th Author's Affiliation | Semiconductor System Engineering Center, Toshiba Corp. |
| 9th Author's Name | Yoshiaki Kitaura |
| 9th Author's Affiliation | Research and Development Center, Toshiba Corp. |
| 10th Author's Name | Naotaka Uchitomi |
| 10th Author's Affiliation | Research and Development Center, Toshiba Corp. |
| Date | 1999/1/21 |
| Paper # | ED98-206,MW98-169,ICD98-273 |
| Volume (vol) | vol.98 |
| Number (no) | 524 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |