| Presentation | 1999/1/20 A 0.2-μm BiCMOS Process Technology with Copper Metallization for Ultra High-Speed SRAMs T. Hashimoto, T. Kikuchi, N. Ohashi, T. Saito, S. Wada, A. Shima, M. Kondo, Y. Homma, K. Watanabe, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | A 0.2-μm bipolar-CMOS process technology on a bonded SOI wafer was newly developed. This process was used to fabricate a new-cache memory chip consisting of 9-Mb 0.6-ns SRAMs and a 200-K 25-ps ECL gate array. To achieve high performance, the 0.2-μm bipolar-CMOS process features a 6-μm^2-cell-size BJT with a 50-nm base width, a 6T-CMOS memory cell and copper interconnects that reduce wiring delay by 30%. A combination of low-energy ion-implantation and two-step annealing was applied to form a low-leakage, shallow base junction. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Si-bipolar / BiCMOS / SOI / Cu metallization / OED / Shallow junction / SRAM |
| Paper # | ED98-194,MW98-157,ICD98-261 |
| Date of Issue |
| Conference Information | |
| Committee | ICD |
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| Conference Date | 1999/1/20(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A 0.2-μm BiCMOS Process Technology with Copper Metallization for Ultra High-Speed SRAMs |
| Sub Title (in English) | |
| Keyword(1) | Si-bipolar |
| Keyword(2) | BiCMOS |
| Keyword(3) | SOI |
| Keyword(4) | Cu metallization |
| Keyword(5) | OED |
| Keyword(6) | Shallow junction |
| Keyword(7) | SRAM |
| 1st Author's Name | T. Hashimoto |
| 1st Author's Affiliation | Device Development Center, Hitachi, Ltd.() |
| 2nd Author's Name | T. Kikuchi |
| 2nd Author's Affiliation | Device Development Center, Hitachi, Ltd. |
| 3rd Author's Name | N. Ohashi |
| 3rd Author's Affiliation | Device Development Center, Hitachi, Ltd. |
| 4th Author's Name | T. Saito |
| 4th Author's Affiliation | Device Development Center, Hitachi, Ltd. |
| 5th Author's Name | S. Wada |
| 5th Author's Affiliation | Device Development Center, Hitachi, Ltd. |
| 6th Author's Name | A. Shima |
| 6th Author's Affiliation | Device Development Center, Hitachi, Ltd. |
| 7th Author's Name | M. Kondo |
| 7th Author's Affiliation | Central research Laboratory, Hitachi, Ltd. |
| 8th Author's Name | Y. Homma |
| 8th Author's Affiliation | Central research Laboratory, Hitachi, Ltd. |
| 9th Author's Name | K. Watanabe |
| 9th Author's Affiliation | Device Development Center, Hitachi, Ltd. |
| Date | 1999/1/20 |
| Paper # | ED98-194,MW98-157,ICD98-261 |
| Volume (vol) | vol.98 |
| Number (no) | 523 |
| Page | pp.pp.- |
| #Pages | 7 |
| Date of Issue | |