Presentation 1999/1/20
Improvement of Off-State Breakdown Voltage in Power GaAs MESFETs by Inserting a Neutral p-Buffer Layer
K. Kunihiro, Y. Takahashi, Y. Ohno,
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Abstract(in English) A realistic simulation scheme for improving off-state breakdown voltage(BV_) in power GaAs MESFETs has been developed. In this scheme, impact ionization, tunneling, and surface charge dynamics are all considered. The simulation successfully describes experimentally observed breakdown behavior; i.e.the initial BV_ shift called "walkout" and S-type negative differential conductivity. Using the simulation results, we have developed an FET with a neutralized p-buffer layer that relaxes the electric-field concentration at the gate edge. It has been experimentally confirmed that this FET structure can significantly increase BV_ compared to conventional one.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) GaAs MESFET / Breakdown / Simulator / Surface State / Impact Ionization / Buried p-Layer
Paper # ED98-188,MW98-151,ICD98-255
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Conference Date 1999/1/20(1days)
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Registration To Integrated Circuits and Devices (ICD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Improvement of Off-State Breakdown Voltage in Power GaAs MESFETs by Inserting a Neutral p-Buffer Layer
Sub Title (in English)
Keyword(1) GaAs MESFET
Keyword(2) Breakdown
Keyword(3) Simulator
Keyword(4) Surface State
Keyword(5) Impact Ionization
Keyword(6) Buried p-Layer
1st Author's Name K. Kunihiro
1st Author's Affiliation Optoelectronics and High Frequency Device research Laboratories, NEC Corporation()
2nd Author's Name Y. Takahashi
2nd Author's Affiliation Optoelectronics and High Frequency Device research Laboratories, NEC Corporation
3rd Author's Name Y. Ohno
3rd Author's Affiliation Optoelectronics and High Frequency Device research Laboratories, NEC Corporation
Date 1999/1/20
Paper # ED98-188,MW98-151,ICD98-255
Volume (vol) vol.98
Number (no) 523
Page pp.pp.-
#Pages 8
Date of Issue