Presentation 1998/10/22
Linkage of Device and Circuit Simulators with a MOSFET Table Model
Kazuo Aoyama, Masaaki Tomizawa, Satoshi Tazawa,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) A MOSFET table model that utilizes numerical data of current and capacitance characteristics in MOSFETs has been developed as an alternative to analytical models in a circuit simulator. Using numerical solutions obtained by a device simulator, device and circuit simulators are closely linked through the table model. The device simulator was improved to generate capacitance characteristics besides current characteristics. The table model consists of three-dimensional cubic spline interpolations of current and capacitance characteristics which are continuous and smooth in all operating regions. The model was tested against several CMOS circuits and the convergences were achieved in DC sweep and transient analysis.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) circuit simulator / device simulator / MOSFET / table model / spline interpolation
Paper # VLD98-81,ED98-106,SDM98-142,ICD98-212
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Committee ICD
Conference Date 1998/10/22(1days)
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Registration To Integrated Circuits and Devices (ICD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Linkage of Device and Circuit Simulators with a MOSFET Table Model
Sub Title (in English)
Keyword(1) circuit simulator
Keyword(2) device simulator
Keyword(3) MOSFET
Keyword(4) table model
Keyword(5) spline interpolation
1st Author's Name Kazuo Aoyama
1st Author's Affiliation NTT System Electronics Laboratories()
2nd Author's Name Masaaki Tomizawa
2nd Author's Affiliation NTT System Electronics Laboratories
3rd Author's Name Satoshi Tazawa
3rd Author's Affiliation NTT Affiliated Business Headquarters
Date 1998/10/22
Paper # VLD98-81,ED98-106,SDM98-142,ICD98-212
Volume (vol) vol.98
Number (no) 351
Page pp.pp.-
#Pages 8
Date of Issue