Presentation 1998/10/15
An Image Sensor for Motion Compensation with hierachical scan
T. Nezuka, K. Asada,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) This paper proposes a binary image sensor for motion compensation using a pattern matching and a motion vector detection. Each pixel of the image sensor has a shift register and exclusive OR circuits for pattern matching. The motion vector is obtained by comparing current converted from output of exclusive OR circuits. We can obtain the output code encoded by quad tree scan as a result of the motion compensation. The chip was designed using 1.2um 2Metal 2Poly-Si CMOS technology and composed of 32×32 sensor array and peripheral circuits.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) pattern matching / motion vector / motion compensation / quad tree scan
Paper # DSP98-95,ICD98-182,CPSY98-97
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Conference Date 1998/10/15(1days)
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Paper Information
Registration To Integrated Circuits and Devices (ICD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) An Image Sensor for Motion Compensation with hierachical scan
Sub Title (in English)
Keyword(1) pattern matching
Keyword(2) motion vector
Keyword(3) motion compensation
Keyword(4) quad tree scan
1st Author's Name T. Nezuka
1st Author's Affiliation Dept of Electronics & Engineering Univ.of Tokyo()
2nd Author's Name K. Asada
2nd Author's Affiliation VLSI Design and Education Center
Date 1998/10/15
Paper # DSP98-95,ICD98-182,CPSY98-97
Volume (vol) vol.98
Number (no) 320
Page pp.pp.-
#Pages 6
Date of Issue