| Presentation | 1998/6/19 A Virtual Power/Ground Rails Clamp Scheme for Low Vt CMOS Circuits Kouichi Kumagai, Hiroaki Iwaki, Hiroshi Yoshida, Hisamitsu Suzuki, Takashi Yamada, Susumu Kurosawa, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | A Virtual power/ground Rails Clamp scheme(VRC) is proposed for leakage current reduction of the low Vt CMOS circuits. With a very simple configuration, it makes possible both the leakage current reduction and the stable data holding in the sleep mode. To demonstrate the effectiveness of the VRC, a 24-bit multiplier-accumulator macro with VRC scheme has been developed using 0.25μm CMOS technology. By employing the VRC scheme, 98% leakage current reduction has been achieved and the stable data holding has been confirmed in the sleep mode, without the speed degradation in the active mode. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | MT-CMOS / low-power / low-voltage / data latch circuit |
| Paper # | ED98-75,SDM98-75,ICD98-74 |
| Date of Issue |
| Conference Information | |
| Committee | ICD |
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| Conference Date | 1998/6/19(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Virtual Power/Ground Rails Clamp Scheme for Low Vt CMOS Circuits |
| Sub Title (in English) | |
| Keyword(1) | MT-CMOS |
| Keyword(2) | low-power |
| Keyword(3) | low-voltage |
| Keyword(4) | data latch circuit |
| 1st Author's Name | Kouichi Kumagai |
| 1st Author's Affiliation | ULSI Device Development Labs., NEC Corporation() |
| 2nd Author's Name | Hiroaki Iwaki |
| 2nd Author's Affiliation | ULSI Device Development Labs., NEC Corporation |
| 3rd Author's Name | Hiroshi Yoshida |
| 3rd Author's Affiliation | ULSI Device Development Labs., NEC Corporation |
| 4th Author's Name | Hisamitsu Suzuki |
| 4th Author's Affiliation | ULSI Device Development Labs., NEC Corporation |
| 5th Author's Name | Takashi Yamada |
| 5th Author's Affiliation | ULSI Device Development Labs., NEC Corporation |
| 6th Author's Name | Susumu Kurosawa |
| 6th Author's Affiliation | ULSI Device Development Labs., NEC Corporation |
| Date | 1998/6/19 |
| Paper # | ED98-75,SDM98-75,ICD98-74 |
| Volume (vol) | vol.98 |
| Number (no) | 121 |
| Page | pp.pp.- |
| #Pages | 7 |
| Date of Issue | |