| Presentation | 1998/6/19 Design of Low-Power CMOS Cell Library Yutaka MURATA, Ken'ichiro UDA, Bu-Yeol LEE, Kazuo TAKI, Tsuyoshi MIZOGUCHI, |
|---|---|
| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | We have designed a low-power CMOS standard cell library. It reduces the power dissipation by transistor sizing and small cell area. However a simple transistor size reduction causes large output delay. We propose a transistor sizing method that reduces power dissipation effectively without increasing output delay, and a layout method that reduces cell area with placing transistors in double rows in both PMOS and NMOS areas. Logic synthesis results using MCNC benchmark circuits show that our method reduces the power dissipation by 34% on average in comparison with conventional CMOS cell library without loosing the operation speed. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | CMOS standard cell / low-power / transistor sizing / cell layout |
| Paper # | ED98-71,SDM98-71,ICD98-70 |
| Date of Issue |
| Conference Information | |
| Committee | ICD |
|---|---|
| Conference Date | 1998/6/19(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
|---|---|
| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Design of Low-Power CMOS Cell Library |
| Sub Title (in English) | |
| Keyword(1) | CMOS standard cell |
| Keyword(2) | low-power |
| Keyword(3) | transistor sizing |
| Keyword(4) | cell layout |
| 1st Author's Name | Yutaka MURATA |
| 1st Author's Affiliation | Graduate School of Science and Technology, Kobe University() |
| 2nd Author's Name | Ken'ichiro UDA |
| 2nd Author's Affiliation | Graduate School of Science and Technology, Kobe University |
| 3rd Author's Name | Bu-Yeol LEE |
| 3rd Author's Affiliation | Graduate School of Science and technology, Kobe University |
| 4th Author's Name | Kazuo TAKI |
| 4th Author's Affiliation | Depaerment of Computer and Systems Engineering, Kobe University |
| 5th Author's Name | Tsuyoshi MIZOGUCHI |
| 5th Author's Affiliation | AIL Ltd. |
| Date | 1998/6/19 |
| Paper # | ED98-71,SDM98-71,ICD98-70 |
| Volume (vol) | vol.98 |
| Number (no) | 121 |
| Page | pp.pp.- |
| #Pages | 8 |
| Date of Issue | |