| Presentation | 1998/6/19 A High Speed and Low Power GaAs Delay Flip-Flop H Satoh, T Enomoto, A Hirobe, T Iwata, M Oh-hashi, M Fujii, N Yoshida, S Asai, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | A delay flip-flop(D-FF)was fabricated by using 0.25μm GaAs HJFET technology. The chip size is 592×662μm^2 and an active area is 113×178μm^2. The maximum operating clock frequencies(f_mc)of this D-FF was 7.15GHz at 1.1V supply voltages(V_dd). Clear, wide eye openings were obtained in a f_mc range up to 7.15GHz. Operating speeds were confirmed at an error rate of less than 10^-9 with a(2^9-1)pseudo-random signal. This D-FF operated at 5GHz on V_dd=0.58V, and its power dissipation was 1.93mW, which is the world lowest power dissipation. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | GaAs HJFET / Delay Flip-Flop / Latch |
| Paper # | ED98-69,SDM98-69,ICD98-68 |
| Date of Issue |
| Conference Information | |
| Committee | ICD |
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| Conference Date | 1998/6/19(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A High Speed and Low Power GaAs Delay Flip-Flop |
| Sub Title (in English) | |
| Keyword(1) | GaAs HJFET |
| Keyword(2) | Delay Flip-Flop |
| Keyword(3) | Latch |
| 1st Author's Name | H Satoh |
| 1st Author's Affiliation | Chuo University() |
| 2nd Author's Name | T Enomoto |
| 2nd Author's Affiliation | Chuo University |
| 3rd Author's Name | A Hirobe |
| 3rd Author's Affiliation | Chuo University |
| 4th Author's Name | T Iwata |
| 4th Author's Affiliation | Chuo University |
| 5th Author's Name | M Oh-hashi |
| 5th Author's Affiliation | Chuo University |
| 6th Author's Name | M Fujii |
| 6th Author's Affiliation | NEC Corporation |
| 7th Author's Name | N Yoshida |
| 7th Author's Affiliation | NEC Corporation |
| 8th Author's Name | S Asai |
| 8th Author's Affiliation | NEC Corporation |
| Date | 1998/6/19 |
| Paper # | ED98-69,SDM98-69,ICD98-68 |
| Volume (vol) | vol.98 |
| Number (no) | 121 |
| Page | pp.pp.- |
| #Pages | 8 |
| Date of Issue | |