| Presentation | 1998/6/19 A 4.25Gb/s CMOS Fiber Channel Transceiver LSI Muneo Fukaishi, Kazuyuki Nakamura, Masaharu Sato, Yutaka Tsutsui, Syuji Kishi, Michio Yotsuyanagi, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | A single-chip 4.25Gb/s transceiver with an 8B/10B encoder/decoder as specified in the emerging ANSI Fiber Channel standard has been developed using 0.25μm CMOS technology. This transceiver features newly developed an asynchronous tree-type 1:8DEMUX, parallel-to-parallel frequency conversion circuits, and comma detection and word alignment logic. The core of the transmitter occupies an area of 1.1×1.2mm^2, that of the receiver 1×2.3mm^2. The transceiver consumes 600mW in 4.25Gb/s operations with a 2.5V supply |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Fiber Channel / transceiver / MUX / DEMUX / 8B10B encoder / 10B8B decoder / CMOS |
| Paper # | ED98-68,SDM98-68,ICD98-67 |
| Date of Issue |
| Conference Information | |
| Committee | ICD |
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| Conference Date | 1998/6/19(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A 4.25Gb/s CMOS Fiber Channel Transceiver LSI |
| Sub Title (in English) | |
| Keyword(1) | Fiber Channel |
| Keyword(2) | transceiver |
| Keyword(3) | MUX |
| Keyword(4) | DEMUX |
| Keyword(5) | 8B10B encoder |
| Keyword(6) | 10B8B decoder |
| Keyword(7) | CMOS |
| 1st Author's Name | Muneo Fukaishi |
| 1st Author's Affiliation | Silicon Systems Research Labs., NEC Corporation() |
| 2nd Author's Name | Kazuyuki Nakamura |
| 2nd Author's Affiliation | Silicon Systems Research Labs., NEC Corporation |
| 3rd Author's Name | Masaharu Sato |
| 3rd Author's Affiliation | Microcomputer Div.NEC Corporation |
| 4th Author's Name | Yutaka Tsutsui |
| 4th Author's Affiliation | Microcomputer Div.NEC Corporation |
| 5th Author's Name | Syuji Kishi |
| 5th Author's Affiliation | Microcomputer Div.NEC Corporation |
| 6th Author's Name | Michio Yotsuyanagi |
| 6th Author's Affiliation | Silicon Systems Research Labs., NEC Corporation |
| Date | 1998/6/19 |
| Paper # | ED98-68,SDM98-68,ICD98-67 |
| Volume (vol) | vol.98 |
| Number (no) | 121 |
| Page | pp.pp.- |
| #Pages | 8 |
| Date of Issue | |