| Presentation | 1998/6/19 A 5.3GB/s embedded SDRAM core with slightly boosting scheme H Noda, A Yamazaki, T Yamagata, I Hayashi, K Arimoto, M Yamada, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | It is a key issue to improve transistor performance for developing system LSIs. This paper proposes a slightly boosting scheme which reduces the boosted voltage(V_PP)for the word line voltage to almost the same level as the external power supply(V_CC). Using this scheme, and embedded SDRAM core, which operates at a 166MHz clock frequency and achieves 4 cycles of RAS latency, has been developed. The block write operation for graphic applications and the test circuit built in the core for testing the DRAM core directly are also introduced. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | embedded DRAM / slightly boosting / block write / test circuit |
| Paper # | ED98-64,SDM98-64,ICD98-63 |
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| Conference Information | |
| Committee | ICD |
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| Conference Date | 1998/6/19(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
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| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A 5.3GB/s embedded SDRAM core with slightly boosting scheme |
| Sub Title (in English) | |
| Keyword(1) | embedded DRAM |
| Keyword(2) | slightly boosting |
| Keyword(3) | block write |
| Keyword(4) | test circuit |
| 1st Author's Name | H Noda |
| 1st Author's Affiliation | ULSI Development Center, Mitsubishi Electric Corp.() |
| 2nd Author's Name | A Yamazaki |
| 2nd Author's Affiliation | ULSI Development Center, Mitsubishi Electric Corp. |
| 3rd Author's Name | T Yamagata |
| 3rd Author's Affiliation | ULSI Development Center, Mitsubishi Electric Corp. |
| 4th Author's Name | I Hayashi |
| 4th Author's Affiliation | ULSI Development Center, Mitsubishi Electric Corp. |
| 5th Author's Name | K Arimoto |
| 5th Author's Affiliation | ULSI Development Center, Mitsubishi Electric Corp. |
| 6th Author's Name | M Yamada |
| 6th Author's Affiliation | ULSI Development Center, Mitsubishi Electric Corp. |
| Date | 1998/6/19 |
| Paper # | ED98-64,SDM98-64,ICD98-63 |
| Volume (vol) | vol.98 |
| Number (no) | 121 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |