| Presentation | 1998/8/21 A CMOS 6b 400MS/s ADC with Error Correction Sanroku Tsukamoto, Toshiaki Endo, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | A CMOS 6-bit 400MSample/s (MS/s) flash A/D Converter (ADC), using an additional comparator for background auto-zeroing has been developed. Additionally an error correction technique detects and corrects errors after thermometer code ZERO-to-ONE transition detection, improving the error rate from 10E-4 to 10E-8 at 400MS/S with a 200MHz analog input. This ADC was fabricated in a single poly, double metal, 0.35μm CMOS technology and occupies 1.6×0.75mm. The power consumption is 190mW at 400MS/s with 3.0V power supply. This ADC has a 2 clock cycle latency. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | A/D converter / auto-zero / background / error correction / flash |
| Paper # | ICD98-137 |
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| Conference Information | |
| Committee | ICD |
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| Conference Date | 1998/8/21(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A CMOS 6b 400MS/s ADC with Error Correction |
| Sub Title (in English) | |
| Keyword(1) | A/D converter |
| Keyword(2) | auto-zero |
| Keyword(3) | background |
| Keyword(4) | error correction |
| Keyword(5) | flash |
| 1st Author's Name | Sanroku Tsukamoto |
| 1st Author's Affiliation | Fujitsu VLSI Limited() |
| 2nd Author's Name | Toshiaki Endo |
| 2nd Author's Affiliation | Fujitsu VLSI Limited |
| Date | 1998/8/21 |
| Paper # | ICD98-137 |
| Volume (vol) | vol.98 |
| Number (no) | 245 |
| Page | pp.pp.- |
| #Pages | 8 |
| Date of Issue | |