Presentation 1998/8/21
Low-Power Pipelined A/D Converter Using a Single-Ended Amplifier
Daisuke MIYAZAKI, Shoji KAWAHITO, Yoshiaki TADOKORO,
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Abstract(in English) This paper presents a new scheme of a low-power pipelined A/D converter using single-ended amplifier. The proposed pipelined ADC algorithm using switched capacitor circuits has a small capacitor mismatch sensitivity, allowing us to use a smaller capacitance. The proposed single-ended amplifier is based on a dynamic-biased regulated cascode scheme which has a small bias current with high gain, high output swing and high switching speed. These properties allows us to design a low-power high-speed A/D converters. Total power dissipation can be greatly reduced compared with the conventional differential pipelined A/D converters by a factor of 1/6.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) pipelined A/D converter / single-ended amplifier / low-power design / portable video device
Paper # ICD98-135
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Conference Date 1998/8/21(1days)
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Registration To Integrated Circuits and Devices (ICD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Low-Power Pipelined A/D Converter Using a Single-Ended Amplifier
Sub Title (in English)
Keyword(1) pipelined A/D converter
Keyword(2) single-ended amplifier
Keyword(3) low-power design
Keyword(4) portable video device
1st Author's Name Daisuke MIYAZAKI
1st Author's Affiliation Department of Information and Computer Sciences Faculty of Engineering Toyohashi University of Technology()
2nd Author's Name Shoji KAWAHITO
2nd Author's Affiliation Department of Information and Computer Sciences Faculty of Engineering Toyohashi University of Technology
3rd Author's Name Yoshiaki TADOKORO
3rd Author's Affiliation Department of Information and Computer Sciences Faculty of Engineering Toyohashi University of Technology
Date 1998/8/21
Paper # ICD98-135
Volume (vol) vol.98
Number (no) 245
Page pp.pp.-
#Pages 8
Date of Issue