Presentation 1998/8/21
A 16b △Σ DAC with Non-linear Quantization Technique
Satoshi Hanazawa, Takao Okazaki,
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Abstract(in English) This paper describes an oversampling sigma-delta D/A converter (DAC) for next-generation voiceband PCM CODEC, which requires not only wider dynamic range but also lower power consumption in A/D converter (ADC) and DAC. The DAC achieves maximum signal-to-noise + distortion ratio (SNDR) of 100dB with psophometric-weighting, and moreover, it reduces both its size and power dissipation by non-linear quantization technique (14 levels). The CODEC-LSI is realized in a 6.9mm×6.9mm chip using 0.8um double-poly double-metal CMOS technology, and packaged in 64-pin QFP. It consumes only 73mW typically from a single 5V supply despite some additional new functions, and it operates from -20℃ to 80℃.
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Keyword(in English) Voiceband PCM CODEC / D/A converter / Non-linear quantization / Signal-to-noise+distortion ration (SNDR)
Paper # ICD98-130
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Conference Date 1998/8/21(1days)
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Registration To Integrated Circuits and Devices (ICD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) A 16b △Σ DAC with Non-linear Quantization Technique
Sub Title (in English)
Keyword(1) Voiceband PCM CODEC
Keyword(2) D/A converter
Keyword(3) Non-linear quantization
Keyword(4) Signal-to-noise+distortion ration (SNDR)
1st Author's Name Satoshi Hanazawa
1st Author's Affiliation Device Development Center, Hitachi, Ltd.()
2nd Author's Name Takao Okazaki
2nd Author's Affiliation Device Development Center, Hitachi, Ltd.
Date 1998/8/21
Paper # ICD98-130
Volume (vol) vol.98
Number (no) 245
Page pp.pp.-
#Pages 6
Date of Issue