| Presentation | 1998/8/21 Analog-Digital merged Pattern Matching Circuits Using PWM Signals H. Nakamoto, D Nomasaki, M. Fukuhara, M. Nagata, T. Morie, A. Iwata, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | The pattren matching circuit, necessary for an image recognition system, is implemented based on the A-D merged circuit architecture using pulse-width modulation (PWM) signals. This circuit contains SRAM store datas, distance calculation circuit array, CPC, WTA. Distance calculation circuit array integrate accumulately an absolute value of difference between image and reference vectors based on a switched current integration technique. CPC transforms integration charge into digital values based on a Charge Packet Count technique. WTA searchs the minimum value and detects the most approximate reference vector. The 0.8um CMOS test chip operates 28 parallel distance. The test chip demonstrates 0.8GOPS processing capability, 7GOPS/W energy efficiency at 25MHz operation frequency. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Pattern Matching / Pulse-Width Modulation / parallel distance calculation / A-D merged circuit architecture |
| Paper # | ICD98-127 |
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| Conference Information | |
| Committee | ICD |
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| Conference Date | 1998/8/21(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Analog-Digital merged Pattern Matching Circuits Using PWM Signals |
| Sub Title (in English) | |
| Keyword(1) | Pattern Matching |
| Keyword(2) | Pulse-Width Modulation |
| Keyword(3) | parallel distance calculation |
| Keyword(4) | A-D merged circuit architecture |
| 1st Author's Name | H. Nakamoto |
| 1st Author's Affiliation | Faculty of Engineering, Hiroshima University() |
| 2nd Author's Name | D Nomasaki |
| 2nd Author's Affiliation | Faculty of Engineering, Hiroshima University |
| 3rd Author's Name | M. Fukuhara |
| 3rd Author's Affiliation | Faculty of Engineering, Hiroshima University |
| 4th Author's Name | M. Nagata |
| 4th Author's Affiliation | Faculty of Engineering, Hiroshima University |
| 5th Author's Name | T. Morie |
| 5th Author's Affiliation | Faculty of Engineering, Hiroshima University |
| 6th Author's Name | A. Iwata |
| 6th Author's Affiliation | Faculty of Engineering, Hiroshima University |
| Date | 1998/8/21 |
| Paper # | ICD98-127 |
| Volume (vol) | vol.98 |
| Number (no) | 245 |
| Page | pp.pp.- |
| #Pages | 8 |
| Date of Issue | |