Presentation 1998/12/11
Evaluation of Structural Integrity in Plastic Encapsulated Semiconductor Package during Soldering Process
Noriyasu KAWAMURA, Kenji HIROHATA, Takashi KAWAKAMI, Kanako SAWADA, Toshikazu MINO, Atsushi KUROSU, Hideko MUKAIDA,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) Plastic encapsulated semiconductor package may crack if an internal delamination is induced during the reflow soldering process. Evaluation of structural Integrity in the packages is becoming increasingly important. Firstly, three-dimensional stress analyses were carried out to obtain stress distributions in the package during the soldering process. Secondly, the adhesion integrity between chip backside and resin was predicted by comparing the analytical results for the package and the stress distribution calculated from adhesion strength test results. Next, integrity of resin edge structure was estimated using criterion calculated from fracture toughness and bending strength for resin. Finally, the new evalution method was confirmed to be effective by comparison with package reliability tests.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Stress analysis / Strength test / Fracture criterion / Plastic package / Reflow cracking
Paper # CPM98-161,ICD98-240
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Conference Date 1998/12/11(1days)
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Registration To Integrated Circuits and Devices (ICD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Evaluation of Structural Integrity in Plastic Encapsulated Semiconductor Package during Soldering Process
Sub Title (in English)
Keyword(1) Stress analysis
Keyword(2) Strength test
Keyword(3) Fracture criterion
Keyword(4) Plastic package
Keyword(5) Reflow cracking
1st Author's Name Noriyasu KAWAMURA
1st Author's Affiliation Research and Development Center, Toshiba Corporation()
2nd Author's Name Kenji HIROHATA
2nd Author's Affiliation Research and Development Center, Toshiba Corporation
3rd Author's Name Takashi KAWAKAMI
3rd Author's Affiliation Research and Development Center, Toshiba Corporation
4th Author's Name Kanako SAWADA
4th Author's Affiliation Semiconductor Manufacturing Engineering Center, Toshiba Corporation
5th Author's Name Toshikazu MINO
5th Author's Affiliation Semiconductor Manufacturing Engineering Center, Toshiba Corporation
6th Author's Name Atsushi KUROSU
6th Author's Affiliation Semiconductor Manufacturing Engineering Center, Toshiba Corporation
7th Author's Name Hideko MUKAIDA
7th Author's Affiliation Semiconductor Manufacturing Engineering Center, Toshiba Corporation
Date 1998/12/11
Paper # CPM98-161,ICD98-240
Volume (vol) vol.98
Number (no) 459
Page pp.pp.-
#Pages 8
Date of Issue