| Presentation | 1998/5/22 Reconfiguration Method of Processor Arrays using Self-Organizing Map Noritaka SHIGEI, Hiromi MIYAJIMA, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | A method for reconfiguring processor arrays which contains faulty processors. The method is based on self-organizing map (SOM). In the method, first, a logical array is mapped onto a physical array by SOM. Then, routing on the array is performed according to the mapping. In this paper, we describes the mapping algorithm based on SOM and the routing scheme, and computer simulations are performed. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | processor array / faulty processor / reconfiguration / self-organizing map / fault tolerance |
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| Conference Information | |
| Committee | ICD |
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| Conference Date | 1998/5/22(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Reconfiguration Method of Processor Arrays using Self-Organizing Map |
| Sub Title (in English) | |
| Keyword(1) | processor array |
| Keyword(2) | faulty processor |
| Keyword(3) | reconfiguration |
| Keyword(4) | self-organizing map |
| Keyword(5) | fault tolerance |
| 1st Author's Name | Noritaka SHIGEI |
| 1st Author's Affiliation | Shimane University() |
| 2nd Author's Name | Hiromi MIYAJIMA |
| 2nd Author's Affiliation | Kagoshima University |
| Date | 1998/5/22 |
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| Volume (vol) | vol.98 |
| Number (no) | 66 |
| Page | pp.pp.- |
| #Pages | 6 |
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