| Presentation | 1995/12/14 High-Speed interface circuits GTL I/O development Harumi Kawano, Tadao Takahashi, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | This is a development report of input buffer circuit with IDDS test mode and output buffer circuit with original slew rate control for the GTL which is one of the low voltage swing I/O interface. As for input buffer circuit we could stop the DC current of differential amplitude circuit by its test mode circuit and set the IDDS test mode easily by REF pin (sense level signal) and input pin without additional test pin (and vice versa). Still it is possible that internal function can be operate in also IDDS test mode for its multi-point measurement. As regards the output buffer circuit, we observed a good wave form in 100 MHz transmit (Generally 75MHz transmit seems to be limit) and confirmed that it is sufficient to fill the VIH/VIL requirements of the next connected LSI though fixed output signal is affected by simultaneous switching output. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | ASIC / GTL / IDDS test / slew rate control |
| Paper # | ICD95-184 |
| Date of Issue |
| Conference Information | |
| Committee | ICD |
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| Conference Date | 1995/12/14(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | High-Speed interface circuits GTL I/O development |
| Sub Title (in English) | |
| Keyword(1) | ASIC |
| Keyword(2) | GTL |
| Keyword(3) | IDDS test |
| Keyword(4) | slew rate control |
| 1st Author's Name | Harumi Kawano |
| 1st Author's Affiliation | Logic LSI Design Section-1, LSI Design Dept.-1, Oki Micro Design Miyazaki Co. Ltd.() |
| 2nd Author's Name | Tadao Takahashi |
| 2nd Author's Affiliation | Semi Custom LSI Dept., Logic LSI Division Electronic Devices Group, Oki Electric Industry Co., Ltd. |
| Date | 1995/12/14 |
| Paper # | ICD95-184 |
| Volume (vol) | vol.95 |
| Number (no) | 426 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |