Presentation 1995/5/26
3D frame buffer memory with Z-compare andα-blend units
Hideto Matsuoka, Kazunari Inoue, Hisashi Nakamura, Koji Yamamoto, Minoru Yamawaki, Kazuhiro Takahashi, Kazunori Ishihara,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) The improvement of rendering performance depends on frame buffer. 3D-RAM integrates triple-ported cache SRAM. Z-compare andα-blending unit on single chip. So that 400M pixels/sec rendering rate with mostly-write is realized. It is ten times as fast as conventional DRAM and VRAM.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) 3D-RAM / Frame buffer memory / 3D graphics
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Conference Date 1995/5/26(1days)
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Registration To Integrated Circuits and Devices (ICD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) 3D frame buffer memory with Z-compare andα-blend units
Sub Title (in English)
Keyword(1) 3D-RAM
Keyword(2) Frame buffer memory
Keyword(3) 3D graphics
1st Author's Name Hideto Matsuoka
1st Author's Affiliation Mitsubishi Electric Corporation()
2nd Author's Name Kazunari Inoue
2nd Author's Affiliation Mitsubishi Electric Corporation
3rd Author's Name Hisashi Nakamura
3rd Author's Affiliation Mitsubishi Electric Corporation
4th Author's Name Koji Yamamoto
4th Author's Affiliation Mitsubishi Electric Corporation
5th Author's Name Minoru Yamawaki
5th Author's Affiliation Mitsubishi Electric Corporation
6th Author's Name Kazuhiro Takahashi
6th Author's Affiliation Mitsubishi Electric Corporation
7th Author's Name Kazunori Ishihara
7th Author's Affiliation Mitsubishi Electric Corporation
Date 1995/5/26
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Volume (vol) vol.95
Number (no) 72
Page pp.pp.-
#Pages 9
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